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LPC2129 ARM7 Disable/Enable Interrupt..

Started by unikum888 May 12, 2005
Hello,
I need to disable the interrupt completely for a short while. I have
found that the ARM7 can disable interrupts with the DI and EI asm.
Theese does only work for me in the startup.s file (I made a test) and
not as inline asm where I really need them.

I have found some code that may work inline, but can someone tell me
about their experiences, if any?

Inline asm, that I have found and plan to use:

#define IENABLE \
__asm { MSR CPSR_c, #0x1F } /* Enable IRQ (Sys Mode) */ \

#define IDISABLE \
__asm { MSR CPSR_c, #0x92 } /* Disable IRQ (IRQ Mode) */ \

Will this work or does anybody have a better sollution?

Thanks,
Regards Kasper


An Engineer's Guide to the LPC2100 Series

Kasper,

> Inline asm, that I have found and plan to use:
>
> #define IENABLE \
> __asm { MSR CPSR_c, #0x1F } /* Enable IRQ (Sys Mode) */ \
>
> #define IDISABLE \
> __asm { MSR CPSR_c, #0x92 } /* Disable IRQ (IRQ Mode) */ \


a) You must be sure you are in ARM mode.
b) You must be at least in SYS mode.
c) You should not switch CPU state unless you are sure you know what you
are
doing :-)

I always suggest a small assmembly routine.

.macro SC_TFUNC name
.text
.code 16
.thumb_func
.globl name
name:
.endm /*
****************************************
** disable interrupts and return old mask
****************************************
*/
SC_TFUNC sc_sysLock
bx pc
nop
.code 32
.globl sc_sysLock_a
sc_sysLock_a:
mrs r0,cpsr
orr r1,r0,#PSR_I_BIT
msr cpsr_c,r1
bx lr

/*
****************************************
** restore interrupt mask
****************************************
*/
SC_TFUNC sc_sysUnlock
bx pc
nop
.code 32
.globl sc_sysUnlock_a
sc_sysUnlock_a:
and r0,r0,#PSR_I_BIT
mrs r1,cpsr
bic r1,r1,#PSR_I_BIT
orr r1,r1,r0
msr cpsr_c,r1
bx lr
--
42Bastian Schick



--- In lpc2000@lpc2..., 42Bastian Schick <bastian42@m...>
wrote:
> Kasper,
>
> > Inline asm, that I have found and plan to use:
> >
> > #define IENABLE \
> > __asm { MSR CPSR_c, #0x1F } /* Enable IRQ (Sys Mode)
*/ \
> >
> > #define IDISABLE \
> > __asm { MSR CPSR_c, #0x92 } /* Disable IRQ (IRQ Mode)
*/ \
>
>
> a) You must be sure you are in ARM mode.
> b) You must be at least in SYS mode.
> c) You should not switch CPU state unless you are sure you know
what you
> are
> doing :-)
>
> I always suggest a small assmembly routine.
>
> .macro SC_TFUNC name
> .text
> .code 16
> .thumb_func
> .globl name
> name:
> .endm > /*
> ****************************************
> ** disable interrupts and return old mask
> ****************************************
> */
> SC_TFUNC sc_sysLock
> bx pc
> nop
> .code 32
> .globl sc_sysLock_a
> sc_sysLock_a:
> mrs r0,cpsr
> orr r1,r0,#PSR_I_BIT
> msr cpsr_c,r1
> bx lr
>
> /*
> ****************************************
> ** restore interrupt mask
> ****************************************
> */
> SC_TFUNC sc_sysUnlock
> bx pc
> nop
> .code 32
> .globl sc_sysUnlock_a
> sc_sysUnlock_a:
> and r0,r0,#PSR_I_BIT
> mrs r1,cpsr
> bic r1,r1,#PSR_I_BIT
> orr r1,r1,r0
> msr cpsr_c,r1
> bx lr >
> --
> 42Bastian Schick
Hello Bastian
Thanks very much for your answer. Sorry but I do not know asm so
could you please explain what happens in every line and is the above
ready to insert in my existing C-code?
Regards Kasper


Mark,

I found my post. There were a number of good ones around the same time frame. >Date: Mon, 31 May 2004 21:34:18 -0400
>To:
>From: Donald E Haselwood <dhaselwood@dhas...>
>Subject: Re: [68HC12] Re: Maths
>
>Not long ago a friend that does imbedded stuff needed to do a very fast,
>but low accuracy log. We tinkered around with some ideas and ended up
>basing it on the following approximation--
>
>ln(1 + x) = x - (x**2)/2 + (x**3)/3 ...
>
>For his app the first term was all that was necessary. He accomplished
>this on a Power PC in just five (which I must say were *very* cleverly
>crafted) assembly language instructions (and no loops)! On this processor
>there is an instruction that determines the leading zeros in a register in
>just one machine cycle (at 80 Mhz), which gives it a enormous advantage
>over the \\\\\\\'11 or \\\\\\\'12 machines.
>
>To use the approximation determine the number of binary points in the
>whole part of the number (shift lefts as shown in the C code of the
>earlier posts, (which was base 10 so the shifting was done by dividing by
>10)). The number of binary points minus 1 gives the whole number part of
>the log and the remaining number the fraction (i.e. the first term of the
>approximation). (I\\\\\\\'m doing this from memory...so doing some pencil and
>paper examples is recommended ;)
>
>He did a run/printout to check the deviation of abbreviated approximation
>versus the full precision library result. It was a few percent except for
>small numbers. For the app being talked about here, the second term
>would probably be needed to improved the accuracy. Note that at the
>points where the fraction of log(x) is zero, the approximation is
>exact. Between these points one can interpolate with a straight line,
>which of course is merely the first term, and improve the interpolation
>with a 2nd order curve, which is the first two terms.
>
>As mentioned earlier the change of base is easily accomplished by a scale
>factor, which can be done in fixed point
>
>Regards,
>
>Donald E Haselwood


Kasper,

I will not comment every line, but a bit

>> .macro SC_TFUNC name
>> .text
>> .code 16
>> .thumb_func
>> .globl name
>> name:
>> .endm

Simply a macro for my lazy fingers ...

BTW: Get hands on ARM ARM and read it carefully. You will meet assembly
anyway :-)

>> SC_TFUNC sc_sysLock
>> bx pc
>> nop
>> .code 32
>> .globl sc_sysLock_a
>> sc_sysLock_a:
>> mrs r0,cpsr
>> orr r1,r0,#PSR_I_BIT
>> msr cpsr_c,r1
>> bx lr

Disable interrupts and returns the old PSR in R0 in order to restore it
later.
The bx pc; nop is a veneer to change from Thumb to ARM mode.

>> SC_TFUNC sc_sysUnlock
>> bx pc
>> nop
>> .code 32
>> .globl sc_sysUnlock_a
>> sc_sysUnlock_a:
>> and r0,r0,#PSR_I_BIT
>> mrs r1,cpsr
>> bic r1,r1,#PSR_I_BIT
>> orr r1,r1,r0
>> msr cpsr_c,r1
>> bx lr

This _restores_ the I bit with the value stored in R0.

Restore because , sc_sysLock() might be called with interrupts already
disabled.

> Thanks very much for your answer. Sorry but I do not know asm so
> could you please explain what happens in every line and is the above
> ready to insert in my existing C-code?

Put it in lock.S (or any other file, but with capital S) and compile it
(with gcc !). Add prototypes to your C code. Use it.
You may inline it, but _I_ use inline only in very rare situations. --
42Bastian Schick




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