Footprint for LPC

Started by vrrraju February 11, 2004
Dear Friends,

I am happy to see that one group is dedicated towards Philips
LPC2100. I am trying to build a board based on Philips LPC2106. I am
looking for the foot print and library for the LPC2100 for Eagle PCB.
I have checked with cadsoft for the same but they haven't uploaded
any library for the Philips LPC. Please if anybody has built the
library for the same in eagle, let me know because it will be of
great help to me.

Thanks in advance.

LPC's faithfully,

Rajneesh



An Engineer's Guide to the LPC2100 Series


>From: "vrrraju" <>
>Reply-To:
>To:
>Subject: [lpc2100] Footprint for LPC
>Date: Wed, 11 Feb 2004 17:46:23 -0000
>
>Dear Friends,
>
>I am happy to see that one group is dedicated towards Philips
>LPC2100. I am trying to build a board based on Philips LPC2106. I am
>looking for the foot print and library for the LPC2100 for Eagle PCB.
>I have checked with cadsoft for the same but they haven't uploaded
>any library for the Philips LPC. Please if anybody has built the
>library for the same in eagle, let me know because it will be of
>great help to me.

I think there is one in the group's Files area. Leon
--
Leon Heller, G1HSM Tel: +44 1424 423947
Email: aqzf13 at dsl dot pipex dot com
WWW: http://webspace.webring.com/people/jl/leon_heller/

_________________________________________________________________
Find a cheaper internet access deal - choose one to suit you.
http://www.msn.co.uk/internetaccess


--- In , "vrrraju" <vrrraju@y...> wrote:
> Dear Friends,
>
> I am happy to see that one group is dedicated towards Philips
> LPC2100. I am trying to build a board based on Philips LPC2106. I am
> looking for the foot print and library for the LPC2100 for Eagle PCB.
> I have checked with cadsoft for the same but they haven't uploaded
> any library for the Philips LPC. Please if anybody has built the
> library for the same in eagle, let me know because it will be of
> great help to me.
>
> Thanks in advance.
>
> LPC's faithfully,
>
> Rajneesh

Hello Rajneesh,

have a look at the files link in the yahoo group
http://groups.yahoo.com/group/lpc2100/files
there are 2 versions of the Eagle library file (and one for Protel)

by the way, what kind of application are you doing with the LPC2106?

There are also schematics of boards on the link list. Also there are
several boards already available e.g.

Leon's board http://webspace.webring.com/people/jl/leon_heller//lpc2104.html
TinyARM http://www.tinyarm.com/
Ashling http://www.ashling.com/support/lpc2100/index.html
IAR http://www.iar.com/Products/?name=KSDKLPC2106
For the LPC2124/LPC2129 Keil http://www.keil.com/mcb2100/
One from Olimex.........

So, there are plenty (low-cost) boards for evaluation.

Cheers, Bob



lpc2100_fan wrote:
> There are also schematics of boards on the link list. Also there are
> several boards already available e.g.

We've also got a Wiki where information is being accumulated whenever I
can find it, or somebody else provides:

http://www.open-research.org.uk/ARMuC/

ABS


or make your own library entry from official philips footprint drawing as i
am doing it
for LQFP48 package
http://www.semiconductors.philips.com/acrobat/packages/footprint/FOOTPRINT-HTQFP-HLQFP-LQFP-REFLOW.pdf

(i could not find the footprint for HVQFN48 package...)

joseph

----- Original Message -----
From: "Leon Heller" <>
To: <>
Sent: Wednesday, February 11, 2004 12:55 PM
Subject: RE: [lpc2100] Footprint for LPC >
> >From: "vrrraju" <>
> >Reply-To:
> >To:
> >Subject: [lpc2100] Footprint for LPC
> >Date: Wed, 11 Feb 2004 17:46:23 -0000
> >
> >Dear Friends,
> >
> >I am happy to see that one group is dedicated towards Philips
> >LPC2100. I am trying to build a board based on Philips LPC2106. I am
> >looking for the foot print and library for the LPC2100 for Eagle PCB.
> >I have checked with cadsoft for the same but they haven't uploaded
> >any library for the Philips LPC. Please if anybody has built the
> >library for the same in eagle, let me know because it will be of
> >great help to me.
>
> I think there is one in the group's Files area. > Leon
> --
> Leon Heller, G1HSM Tel: +44 1424 423947
> Email: aqzf13 at dsl dot pipex dot com
> WWW: http://webspace.webring.com/people/jl/leon_heller/
>
> _________________________________________________________________
> Find a cheaper internet access deal - choose one to suit you.
> http://www.msn.co.uk/internetaccess > Yahoo! Groups Links





It's always entertaining to play "find the right footprint". The
IPC footprint that most closely matches this is IPC-563A. The
difference? Lands are 1.6mm x .3mm vs Philips 1.1mm x .285mm. The
width difference isn't very significant, but the length is rather
substantial. The typical IPC specs are for MMC or "Maximum Material
Condition", which is basically the large end of all dimensions. LMC
("Least Material Condition") doesn't seem to be used much.

Supposedly, IPC specs are based on real world manufacturing
feedback, and take into account all the little details that relate to
making a product manufacturable. That being said, I am/was using the
IPC-563A footprint. I'd be interested in hearing the results of people
who have had boards made using vapor phase or IR reflow and what pad
dimensions they use.

This has always been a pet peeve of mine. Some manufactures
reference IPC standards, some JEDEC, some have thier own, and some it's
just best guess. Given the choice, I'd prefer they adhered to IPC or
JEDEC, AND published the spec in the datasheet. National is really good
about this. Others are not. Referencing the IPC spec is great, but if
you can't afford to spring for the book, you're hosed. Luckily, I found
a copy on the web (< http://tinymicros.com/ipc >) from 1999, which has
most everything, but does lack TSSOP specs.

--jc

Joseph Tapay wrote:

> or make your own library entry from official philips footprint drawing
> as i
> am doing it
> for LQFP48 package
> http://www.semiconductors.philips.com/acrobat/packages/footprint/FOOTPRINT-HTQFP-HLQFP-LQFP-REFLOW.pdf
>
> (i could not find the footprint for HVQFN48 package...)
>
> joseph
>
> ----- Original Message -----
> From: "Leon Heller" <>
> To: <>
> Sent: Wednesday, February 11, 2004 12:55 PM
> Subject: RE: [lpc2100] Footprint for LPC > >
> > >From: "vrrraju" <>
> > >Reply-To:
> > >To:
> > >Subject: [lpc2100] Footprint for LPC
> > >Date: Wed, 11 Feb 2004 17:46:23 -0000
> > >
> > >Dear Friends,
> > >
> > >I am happy to see that one group is dedicated towards Philips
> > >LPC2100. I am trying to build a board based on Philips LPC2106. I am
> > >looking for the foot print and library for the LPC2100 for Eagle PCB.
> > >I have checked with cadsoft for the same but they haven't uploaded
> > >any library for the Philips LPC. Please if anybody has built the
> > >library for the same in eagle, let me know because it will be of
> > >great help to me.
> >
> > I think there is one in the group's Files area.
> >
> >
> > Leon
> > --
> > Leon Heller, G1HSM Tel: +44 1424 423947
> > Email: aqzf13 at dsl dot pipex dot com
> > WWW: http://webspace.webring.com/people/jl/leon_heller/
> >
>




excellent resource, thanks JC
i've noticed the shortness of the philips' solder land, so far no rationale
to justify it...
philips' drawing shows two different width for start/end of row/column
(0.30mm) and in between (0.23mm) for LQFP64 package, which is relevant to
this group, IPC 565A landing pattern (IPC parlance versus philips
"footprint") does not differentiate, hmmm... interesting...

The solder vaporphase reflow/IR reflow may explain our problem to obtain
chips in quantities of 10. The chip will aquire the temperature of the
solder. Presence of moisture inside the package could cause cracking of
housing. So they get shipped in dry packs containing 250 chips. The
distributor is paralyzed into no action fearing to break the drypack!
This is a hypothesis of course, anybody has one better?

j
----- Original Message -----
From: "J.C. Wren" <>
To: <>
Sent: Wednesday, February 11, 2004 10:37 PM
Subject: Re: [lpc2100] Footprint for LPC > It's always entertaining to play "find the right footprint". The
> IPC footprint that most closely matches this is IPC-563A. The
> difference? Lands are 1.6mm x .3mm vs Philips 1.1mm x .285mm. The
> width difference isn't very significant, but the length is rather
> substantial. The typical IPC specs are for MMC or "Maximum Material
> Condition", which is basically the large end of all dimensions. LMC
> ("Least Material Condition") doesn't seem to be used much.
>
> Supposedly, IPC specs are based on real world manufacturing
> feedback, and take into account all the little details that relate to
> making a product manufacturable. That being said, I am/was using the
> IPC-563A footprint. I'd be interested in hearing the results of people
> who have had boards made using vapor phase or IR reflow and what pad
> dimensions they use.
>
> This has always been a pet peeve of mine. Some manufactures
> reference IPC standards, some JEDEC, some have thier own, and some it's
> just best guess. Given the choice, I'd prefer they adhered to IPC or
> JEDEC, AND published the spec in the datasheet. National is really good
> about this. Others are not. Referencing the IPC spec is great, but if
> you can't afford to spring for the book, you're hosed. Luckily, I found
> a copy on the web (< http://tinymicros.com/ipc >) from 1999, which has
> most everything, but does lack TSSOP specs.
>
> --jc
>
> Joseph Tapay wrote:
>
> > or make your own library entry from official philips footprint drawing
> > as i
> > am doing it
> > for LQFP48 package
> >
http://www.semiconductors.philips.com/acrobat/packages/footprint/FOOTPRINT-HTQFP-HLQFP-LQFP-REFLOW.pdf
> >
> > (i could not find the footprint for HVQFN48 package...)
> >
> > joseph





No, that's entirely correct. One solution is to bake the parts.
We've had to do this a number of times where we use sealed packs for an
initial build, then build from the same stock several months later. Our
manufacturing company doesn't have climate controlled storage, so ICs
and a few parts get baked as a precaution. I think they use something
like 125F for 4 or 8 hours. I've seen the ovens, but I don't remember
the temperature profiles.

From what I understand, the most common failure mode is the bond
wire from the die to the pin breaking. I've never seen external
physical evidence of cracking, at least, not with the microscopes I've
had at my disposal. I would imagine that most of the damage should
occur internally, where the moisture expands before it can out-gas.
Near the edge of the package, it would escape before it could expand far
enough to leave evidence around the pins.

It would be neat to see some photo-micrographs of parts known to be
damaged this way. Other than parts being misregistered, installed
backwards, or boards that sustained mechanical damage (like getting
caught in a misadjusted feed chain...) I've never seen a chip that I've
known to be damaged in manufacturing, i.e., from static or humidity
issues. However, manufacturing is not my regular job, so I'm only
around the manufacturing lines a couple times a year, and usually
fine-tuning the test jigs.

Most of my exposure to the rest of the process is providing feedback
to the manufacturing manager when I find boards with consistent sets of
problems. Since we don't run boards in huge quantities, we don't get
the advantage of getting a line setup and tuned and cranking out
thousands of flawless boards. We typically run 100 to 500 at a time,
and it usually takes 50 boards or so to get all the placements right and
the temperature profiles set. We also use a board house that does small
runs, which means we get human inspection, and these people are far from
flawless.

--jc

Joseph Tapay wrote:

> excellent resource, thanks JC
> i've noticed the shortness of the philips' solder land, so far no
> rationale
> to justify it...
> philips' drawing shows two different width for start/end of row/column
> (0.30mm) and in between (0.23mm) for LQFP64 package, which is relevant to
> this group, IPC 565A landing pattern (IPC parlance versus philips
> "footprint") does not differentiate, hmmm... interesting...
>
> The solder vaporphase reflow/IR reflow may explain our problem to obtain
> chips in quantities of 10. The chip will aquire the temperature of the
> solder. Presence of moisture inside the package could cause cracking of
> housing. So they get shipped in dry packs containing 250 chips. The
> distributor is paralyzed into no action fearing to break the drypack!
> This is a hypothesis of course, anybody has one better?
>
> j



> The solder vaporphase reflow/IR reflow may explain our problem to obtain
> chips in quantities of 10. The chip will aquire the temperature of the
> solder. Presence of moisture inside the package could cause cracking of
> housing. So they get shipped in dry packs containing 250 chips. The
> distributor is paralyzed into no action fearing to break the drypack!
> This is a hypothesis of course, anybody has one better?

Expecially if they're using Pb free leads and the newer plastics that are
used with them--several manufacturers that I know of are having moisture
uptake/retention problems and are recommending a 'prebake' period to lower
the moisture of the chips.

Heat oven to 210F, insert chips, bake until a light golden brown.....

Cheers,
David