Hi, I'm currently using an F449 with one 32kHz crystal on XT1 and one 8Mhz crystal on XT2. I used a snipset of Code from TI to use both crystals. My problem: MCLK is only 1.034 Mhz (probably DCO?) but SMCLK is 8MHz! I did have selected the SELM switch but it does not appear to work.. Somebody has any suggestions? Thanks Martin --------------------------------- WDTCTL = WDTPW + WDTHOLD; // stop watchdog timer FLL_CTL0 = XCAP18PF; // set load capacitance for 32k xtal FLL_CTL1 = FLL_CTL1 & ~XT2OFF; // clear bit = high freq xtal on do // loop until flag is clear { FLL_CTL0 = FLL_CTL0 & ~XT2OF; // clear high freq oscillator fault flag for (i = 50000; i; i--); // delay for crystal to start and FLL to lock } while (FLL_CTL0 & XT2OF); // test high freq oscillator fault flag // if flag remained clear then - FLL_CTL1 = SELS; // switch SMCLK = HF xtal FLL_CTL1 |= SELM_XT2; P1DIR = 0x32; // P1.1, P1.4 & P1.5 to outputs P1SEL = 0x32; // P1.1, P1.4 & P1.5 functions to --------------------------output
8Mhz MCLK on F449
Started by ●November 22, 2002
Reply by ●November 26, 20022002-11-26
Hi Martin, there is a cool feature implemented! The crastal oscillator is checked if it is stable working. If not the controller uses automatically the integrated DCO clock for the CPU. So crystal failure doesn't stop the application. What you have to do is to clear the OFIFG bit in the Controll register IFG1. After a wait loop you have to check if the OFIFG Flag was set again. If so there is a problem with the oscillator. If it is still reset it means the oscillator is working. Best regards, Chris --- In msp430@y..., "expresso22003" <mfischer@h...> wrote: > Hi, > > I'm currently using an F449 with one 32kHz crystal on XT1 and one 8Mhz > crystal on XT2. I used a snipset of Code from TI to use both crystals. > > My problem: MCLK is only 1.034 Mhz (probably DCO?) but SMCLK is 8MHz! > I did have selected the SELM switch but it does not appear to work.. > > Somebody has any suggestions? > > Thanks > Martin > > -------------------------------- - > WDTCTL = WDTPW + WDTHOLD; // stop watchdog timer > FLL_CTL0 = XCAP18PF; // set load capacitance for 32k xtal > FLL_CTL1 = FLL_CTL1 & ~XT2OFF; // clear bit = high freq xtal on > > do // loop until flag is clear > { > FLL_CTL0 = FLL_CTL0 & ~XT2OF; // clear high freq oscillator fault flag > for (i = 50000; i; i--); // delay for crystal to start and > FLL to lock > } > while (FLL_CTL0 & XT2OF); // test high freq oscillator fault flag > > // if flag remained clear then - > FLL_CTL1 = SELS; // switch SMCLK = HF xtal > > FLL_CTL1 |= SELM_XT2; > P1DIR = 0x32; // P1.1, P1.4 & P1.5 to outputs > P1SEL = 0x32; // P1.1, P1.4 & P1.5 functions to > --------------------------output
Reply by ●December 7, 20022002-12-07
The thing is that the oscillator is working (i measure the 8Mhz Clock on
SMCLK) but I can't switch it to the MCLK. Doesnt't matter what I do
with the SELM register, I still have the 1Mhz Clock from the DCO.
The oscialltor flag is already checked with the code snipset i provided.
Anyway I use now a workaround with the 32kHz crystal and the FLL
"upclocking" to 8Mhz, that seems to work.
Martin
--- In msp430@msp4..., "hchris8000" <hchris8000@y...> wrote:
> Hi Martin,
> there is a cool feature implemented! The crastal oscillator is
> checked if it is stable working. If not the controller uses
> automatically the integrated DCO clock for the CPU.
> So crystal failure doesn't stop the application.
>
> What you have to do is to clear the OFIFG bit in the Controll
> register IFG1. After a wait loop you have to check if the
> OFIFG Flag was set again. If so there is a problem with
> the oscillator. If it is still reset it means the oscillator
> is working.
>
> Best regards,
> Chris
>
>
> --- In msp430@y..., "expresso22003" <mfischer@h...> wrote:
> > Hi,
> >
> > I'm currently using an F449 with one 32kHz crystal on XT1 and one
> 8Mhz
> > crystal on XT2. I used a snipset of Code from TI to use both
> crystals.
> >
> > My problem: MCLK is only 1.034 Mhz (probably DCO?) but SMCLK is
> 8MHz!
> > I did have selected the SELM switch but it does not appear to work..
> >
> > Somebody has any suggestions?
> >
> > Thanks
> > Martin
> >
> > --------------------------------
> -
> > WDTCTL = WDTPW + WDTHOLD; // stop watchdog timer
> > FLL_CTL0 = XCAP18PF; // set load capacitance for 32k
> xtal
> > FLL_CTL1 = FLL_CTL1 & ~XT2OFF; // clear bit = high freq xtal on
> >
> > do // loop until flag is clear
> > {
> > FLL_CTL0 = FLL_CTL0 & ~XT2OF; // clear high freq oscillator
> fault flag
> > for (i = 50000; i; i--); // delay for crystal to start and
> > FLL to lock
> > }
> > while (FLL_CTL0 & XT2OF); // test high freq oscillator
> fault flag
> >
> > // if flag remained clear then -
> > FLL_CTL1 = SELS; // switch SMCLK = HF
> xtal
> >
> > FLL_CTL1 |= SELM_XT2;
> > P1DIR = 0x32; // P1.1, P1.4 & P1.5 to outputs
> > P1SEL = 0x32; // P1.1, P1.4 & P1.5 functions
to
> > --------------------------output