Hi, I am using MSP430F1132, and set up timera so it gives interrupt every second: WDTCTL = WDTHOLD | WDTPW; // Stop watchdog. TACTL = TASSEL0 | TACLR; // ACKL for TIMER_A CCTL0 |= CCIE; // Enable CCR0 interrupt CCR0 = 0x7FFF; // Load CCR0 with 32,767 TACTL |= MC0; // Start TA in "up to CCR0" mode I also want to get an interrupt on every 64us (and every 1s) is this possible? If so how? Since this is going to be low power app, I cannot use the smallest value for interrupt and add values to it and check. I need to get an interrupt on specified time plus every 1s. The timings do not have to 100% exact. Note that 64us is software configurable so it could be any of the following values: 64us, 130us, 260us, 510us, 1.0ms, 2.0ms, 4.1ms, 8.2ms, 16ms, 33ms, 66ms, 130ms, 260ms, 520ms, 1.0s, 2.1s, 4.2s Thank you, Omer YALHI
TimerA question
Started by ●April 17, 2003
Reply by ●April 17, 20032003-04-17
er Yalhwrote:
>
> Hi,
>
> I am using MSP430F1132, and set up timera so it gives interrupt every
> second:
>
> WDTCTL = WDTHOLD | WDTPW; // Stop watchdog.
> TACTL = TASSEL0 | TACLR; // ACKL for TIMER_A
> CCTL0 |= CCIE; // Enable CCR0 interrupt
> CCR0 = 0x7FFF; // Load CCR0 with 32,767
> TACTL |= MC0; // Start TA in "up to CCR0"
mode
>
> I also want to get an interrupt on every 64us (and every 1s) is this
> possible? If so how? Since this is going to be low power app, I cannot
> use the smallest value for interrupt and add values to it and check. I
> need to get an interrupt on specified time plus every 1s. The timings
> do not have to 100% exact.
>
> Note that 64us is software configurable so it could be any of the
> following values: 64us, 130us, 260us, 510us, 1.0ms, 2.0ms, 4.1ms, 8.2ms,
> 16ms, 33ms, 66ms, 130ms, 260ms, 520ms, 1.0s, 2.1s, 4.2s
>
> Thank you,
>
> Omer YALHI
The 1 second interrupt you have set up (I assume the crystal is
32.768kHz since you don't actually state this other than in your code)
uses the Timer Overflow interrupt. This leaves you the 3 other Timer_A
interrupt savailable through CCR0 - CCR2. Configuring these as compare
timers lets them be used to generate an interrupt at a pre-determined
period. You must allow for interrupt processing, and interrupt latency,
which will be a cause of Jitter. An interrupt call takes 6 clock cycles
to execute, plus up to 6 clock cycles for the current instruction to
complete, hence the Jitter , or variance in the timing interval may be
0-6 clock cycles, plus any variance introduced by your ISR (Interrupt
Service Routine), if you include conditional execution branches in the
code. RETI requires 5 cycles to execute. Clearing the Interrupt flag
takes, say 5 cycles, so this will limit your fastest possible interrupt.
Even with no other instructions the simple ISR shown, which sets a flag
bit to indicate the interrupt has occured:-
CCR0_ISR:
BIC #CCIFG,&CCTLA0
BIS #EVENT,&FLAGS
RETI
requires 21-27 clock cycles. Of course you could achieve the same result
a little faster using registers, but you are still left with 11-16 clock
cycles for the ISR and RETI, plus 2 cycles minimum to clear the flag and
do something meaningful. Of course each clock is 30.5usecs long using a
watch crystal, but you can use the DCO if acuracy isn't important. I
would suggest that 64 clock cycles should be the absolute minimum
interrupt interval you use. This allows both the timer A overflow ISR
and the CCR0 ISR to be minimally processed. Thus a 1MHz SMCLK, derived
from the DCO is the lowest clock that will meet your needs. This assumes
that you can live with the relatively poor accuracy of the DCO. At 3V
the current in LPM0 is around 55uA, not that low.
Al