Hello forum members,
I am using MSP430F2418 with CrossStudio. I am outputting all the
three clocks - MCLK, SMCLK and ACLK. When I use DCO, I am able to
output MCLK and SMCLK as ACLK is not available for DCO. But when I
use external XTAL (LFXT1), I am able to output only MCLK and ACLK.
There is no output on SMCLK pin. Has anyone experienced this issue
with SMCLK? Here I am giving the code used, please suggest the
modifications in this if any for SMCLK.
__SelectCrystalOsc proc
BIC #OSCOFF+SCG1+SCG0+CPUOFF,SR // Turn on osc.
BIS.B #XTS+DIVA_1+XT2OFF,BCSCTL1 //ACLK Divide by 2
BIC.B #LFXT1S1,&BCSCTL3
BIS.B #LFXT1S0,&BCSCTL3
BIC.B #XCAP1+XCAP0,&BCSCTL3
L1 BIC.B #OFIFG,&IFG1 // Clear OFIFG
MOV #0FFh,R15 // Delay
L2 DEC R15
JNZ L2
BIT.B #OFIFG,&IFG1 // Re?test OFIFG
JNZ L1 // Repeat test if needed
BIS.B #SELM1+SELM0,&BCSCTL2 // Select LFXT1CLK for MCLK
BIS.B #DIVM_2,&BCSCTL2 // Mclk divide by 4
BIS.B #SELS,&BCSCTL2 // Select LFXT1CLK for SMCLK
BIS.B #DIVS_3,&BCSCTL2 // SMClk divide by 8
ret
endproc
Thanks in advance.
MSP430 Clock module
Started by ●February 7, 2009
Reply by ●February 7, 20092009-02-07
If you want to use external XTAL to source SMCLK, you have to connect
it to XT2IN and XT2OUT, not XTIN and XTOUT.
--- In m..., "ti2tt" wrote:
>
> Hello forum members,
>
> I am using MSP430F2418 with CrossStudio. I am outputting all the
> three clocks - MCLK, SMCLK and ACLK. When I use DCO, I am able to
> output MCLK and SMCLK as ACLK is not available for DCO. But when I
> use external XTAL (LFXT1), I am able to output only MCLK and ACLK.
> There is no output on SMCLK pin. Has anyone experienced this issue
> with SMCLK? Here I am giving the code used, please suggest the
> modifications in this if any for SMCLK.
>
> __SelectCrystalOsc proc
> BIC #OSCOFF+SCG1+SCG0+CPUOFF,SR // Turn on osc.
> BIS.B #XTS+DIVA_1+XT2OFF,BCSCTL1 //ACLK Divide by 2
> BIC.B #LFXT1S1,&BCSCTL3
> BIS.B #LFXT1S0,&BCSCTL3
> BIC.B #XCAP1+XCAP0,&BCSCTL3
> L1 BIC.B #OFIFG,&IFG1 // Clear OFIFG
> MOV #0FFh,R15 // Delay
> L2 DEC R15
> JNZ L2
> BIT.B #OFIFG,&IFG1 // Re?test OFIFG
> JNZ L1 // Repeat test if needed
> BIS.B #SELM1+SELM0,&BCSCTL2 // Select LFXT1CLK for MCLK
> BIS.B #DIVM_2,&BCSCTL2 // Mclk divide by 4
> BIS.B #SELS,&BCSCTL2 // Select LFXT1CLK for SMCLK
> BIS.B #DIVS_3,&BCSCTL2 // SMClk divide by 8
> ret
> endproc
>
> Thanks in advance.
>
it to XT2IN and XT2OUT, not XTIN and XTOUT.
--- In m..., "ti2tt" wrote:
>
> Hello forum members,
>
> I am using MSP430F2418 with CrossStudio. I am outputting all the
> three clocks - MCLK, SMCLK and ACLK. When I use DCO, I am able to
> output MCLK and SMCLK as ACLK is not available for DCO. But when I
> use external XTAL (LFXT1), I am able to output only MCLK and ACLK.
> There is no output on SMCLK pin. Has anyone experienced this issue
> with SMCLK? Here I am giving the code used, please suggest the
> modifications in this if any for SMCLK.
>
> __SelectCrystalOsc proc
> BIC #OSCOFF+SCG1+SCG0+CPUOFF,SR // Turn on osc.
> BIS.B #XTS+DIVA_1+XT2OFF,BCSCTL1 //ACLK Divide by 2
> BIC.B #LFXT1S1,&BCSCTL3
> BIS.B #LFXT1S0,&BCSCTL3
> BIC.B #XCAP1+XCAP0,&BCSCTL3
> L1 BIC.B #OFIFG,&IFG1 // Clear OFIFG
> MOV #0FFh,R15 // Delay
> L2 DEC R15
> JNZ L2
> BIT.B #OFIFG,&IFG1 // Re?test OFIFG
> JNZ L1 // Repeat test if needed
> BIS.B #SELM1+SELM0,&BCSCTL2 // Select LFXT1CLK for MCLK
> BIS.B #DIVM_2,&BCSCTL2 // Mclk divide by 4
> BIS.B #SELS,&BCSCTL2 // Select LFXT1CLK for SMCLK
> BIS.B #DIVS_3,&BCSCTL2 // SMClk divide by 8
> ret
> endproc
>
> Thanks in advance.
>
Reply by ●February 9, 20092009-02-09
Hello,
But the user guide for MSP430F2xxx (slau144e.pdf) says that if XT2CLK
is not present on XT2 oscillator, LFXT1CLK or VLOCLK can be used.
Please refer to page no. 300 (BCSCTL2 register settings for SMCLK).
It is not mentioned that only XT2 source is available for SMCLK.
--- In m..., "old_cow_yellow"
wrote:
>
> If you want to use external XTAL to source SMCLK, you have to
connect
> it to XT2IN and XT2OUT, not XTIN and XTOUT.
>
> --- In m..., "ti2tt" wrote:
> >
> > Hello forum members,
> >
> > I am using MSP430F2418 with CrossStudio. I am outputting all the
> > three clocks - MCLK, SMCLK and ACLK. When I use DCO, I am able to
> > output MCLK and SMCLK as ACLK is not available for DCO. But when
I
> > use external XTAL (LFXT1), I am able to output only MCLK and
ACLK.
> > There is no output on SMCLK pin. Has anyone experienced this
issue
> > with SMCLK? Here I am giving the code used, please suggest the
> > modifications in this if any for SMCLK.
> >
> > __SelectCrystalOsc proc
> > BIC #OSCOFF+SCG1+SCG0+CPUOFF,SR // Turn on osc.
> > BIS.B #XTS+DIVA_1+XT2OFF,BCSCTL1 //ACLK Divide by 2
> > BIC.B #LFXT1S1,&BCSCTL3
> > BIS.B #LFXT1S0,&BCSCTL3
> > BIC.B #XCAP1+XCAP0,&BCSCTL3
> > L1 BIC.B #OFIFG,&IFG1 // Clear OFIFG
> > MOV #0FFh,R15 // Delay
> > L2 DEC R15
> > JNZ L2
> > BIT.B #OFIFG,&IFG1 // Re?test OFIFG
> > JNZ L1 // Repeat test if needed
> > BIS.B #SELM1+SELM0,&BCSCTL2 // Select LFXT1CLK for MCLK
> > BIS.B #DIVM_2,&BCSCTL2 // Mclk divide by 4
> > BIS.B #SELS,&BCSCTL2 // Select LFXT1CLK for SMCLK
> > BIS.B #DIVS_3,&BCSCTL2 // SMClk divide by 8
> > ret
> > endproc
> >
> > Thanks in advance.
>
But the user guide for MSP430F2xxx (slau144e.pdf) says that if XT2CLK
is not present on XT2 oscillator, LFXT1CLK or VLOCLK can be used.
Please refer to page no. 300 (BCSCTL2 register settings for SMCLK).
It is not mentioned that only XT2 source is available for SMCLK.
--- In m..., "old_cow_yellow"
wrote:
>
> If you want to use external XTAL to source SMCLK, you have to
connect
> it to XT2IN and XT2OUT, not XTIN and XTOUT.
>
> --- In m..., "ti2tt" wrote:
> >
> > Hello forum members,
> >
> > I am using MSP430F2418 with CrossStudio. I am outputting all the
> > three clocks - MCLK, SMCLK and ACLK. When I use DCO, I am able to
> > output MCLK and SMCLK as ACLK is not available for DCO. But when
I
> > use external XTAL (LFXT1), I am able to output only MCLK and
ACLK.
> > There is no output on SMCLK pin. Has anyone experienced this
issue
> > with SMCLK? Here I am giving the code used, please suggest the
> > modifications in this if any for SMCLK.
> >
> > __SelectCrystalOsc proc
> > BIC #OSCOFF+SCG1+SCG0+CPUOFF,SR // Turn on osc.
> > BIS.B #XTS+DIVA_1+XT2OFF,BCSCTL1 //ACLK Divide by 2
> > BIC.B #LFXT1S1,&BCSCTL3
> > BIS.B #LFXT1S0,&BCSCTL3
> > BIC.B #XCAP1+XCAP0,&BCSCTL3
> > L1 BIC.B #OFIFG,&IFG1 // Clear OFIFG
> > MOV #0FFh,R15 // Delay
> > L2 DEC R15
> > JNZ L2
> > BIT.B #OFIFG,&IFG1 // Re?test OFIFG
> > JNZ L1 // Repeat test if needed
> > BIS.B #SELM1+SELM0,&BCSCTL2 // Select LFXT1CLK for MCLK
> > BIS.B #DIVM_2,&BCSCTL2 // Mclk divide by 4
> > BIS.B #SELS,&BCSCTL2 // Select LFXT1CLK for SMCLK
> > BIS.B #DIVS_3,&BCSCTL2 // SMClk divide by 8
> > ret
> > endproc
> >
> > Thanks in advance.
>
Reply by ●February 9, 20092009-02-09
You misread or misinterpreted that statement in the User's Guide.
For MSP430F2418, there is a XT2 oscillator. Thus the phase "XT2
oscillator present" is TRUE.
--- In m..., "ti2tt" wrote:
>
> Hello,
>
> But the user guide for MSP430F2xxx (slau144e.pdf) says that if XT2CLK
> is not present on XT2 oscillator, LFXT1CLK or VLOCLK can be used.
> Please refer to page no. 300 (BCSCTL2 register settings for SMCLK).
> It is not mentioned that only XT2 source is available for SMCLK.
>
> --- In m..., "old_cow_yellow"
> wrote:
> >
> > If you want to use external XTAL to source SMCLK, you have to
> connect
> > it to XT2IN and XT2OUT, not XTIN and XTOUT.
> >
> > --- In m..., "ti2tt" wrote:
> > >
> > > Hello forum members,
> > >
> > > I am using MSP430F2418 with CrossStudio. I am outputting all the
> > > three clocks - MCLK, SMCLK and ACLK. When I use DCO, I am able to
> > > output MCLK and SMCLK as ACLK is not available for DCO. But when
> I
> > > use external XTAL (LFXT1), I am able to output only MCLK and
> ACLK.
> > > There is no output on SMCLK pin. Has anyone experienced this
> issue
> > > with SMCLK? Here I am giving the code used, please suggest the
> > > modifications in this if any for SMCLK.
> > >
> > > __SelectCrystalOsc proc
> > > BIC #OSCOFF+SCG1+SCG0+CPUOFF,SR // Turn on osc.
> > > BIS.B #XTS+DIVA_1+XT2OFF,BCSCTL1 //ACLK Divide by 2
> > > BIC.B #LFXT1S1,&BCSCTL3
> > > BIS.B #LFXT1S0,&BCSCTL3
> > > BIC.B #XCAP1+XCAP0,&BCSCTL3
> > > L1 BIC.B #OFIFG,&IFG1 // Clear OFIFG
> > > MOV #0FFh,R15 // Delay
> > > L2 DEC R15
> > > JNZ L2
> > > BIT.B #OFIFG,&IFG1 // Re?test OFIFG
> > > JNZ L1 // Repeat test if needed
> > > BIS.B #SELM1+SELM0,&BCSCTL2 // Select LFXT1CLK for MCLK
> > > BIS.B #DIVM_2,&BCSCTL2 // Mclk divide by 4
> > > BIS.B #SELS,&BCSCTL2 // Select LFXT1CLK for SMCLK
> > > BIS.B #DIVS_3,&BCSCTL2 // SMClk divide by 8
> > > ret
> > > endproc
> > >
> > > Thanks in advance.
> > >
>
For MSP430F2418, there is a XT2 oscillator. Thus the phase "XT2
oscillator present" is TRUE.
--- In m..., "ti2tt" wrote:
>
> Hello,
>
> But the user guide for MSP430F2xxx (slau144e.pdf) says that if XT2CLK
> is not present on XT2 oscillator, LFXT1CLK or VLOCLK can be used.
> Please refer to page no. 300 (BCSCTL2 register settings for SMCLK).
> It is not mentioned that only XT2 source is available for SMCLK.
>
> --- In m..., "old_cow_yellow"
> wrote:
> >
> > If you want to use external XTAL to source SMCLK, you have to
> connect
> > it to XT2IN and XT2OUT, not XTIN and XTOUT.
> >
> > --- In m..., "ti2tt" wrote:
> > >
> > > Hello forum members,
> > >
> > > I am using MSP430F2418 with CrossStudio. I am outputting all the
> > > three clocks - MCLK, SMCLK and ACLK. When I use DCO, I am able to
> > > output MCLK and SMCLK as ACLK is not available for DCO. But when
> I
> > > use external XTAL (LFXT1), I am able to output only MCLK and
> ACLK.
> > > There is no output on SMCLK pin. Has anyone experienced this
> issue
> > > with SMCLK? Here I am giving the code used, please suggest the
> > > modifications in this if any for SMCLK.
> > >
> > > __SelectCrystalOsc proc
> > > BIC #OSCOFF+SCG1+SCG0+CPUOFF,SR // Turn on osc.
> > > BIS.B #XTS+DIVA_1+XT2OFF,BCSCTL1 //ACLK Divide by 2
> > > BIC.B #LFXT1S1,&BCSCTL3
> > > BIS.B #LFXT1S0,&BCSCTL3
> > > BIC.B #XCAP1+XCAP0,&BCSCTL3
> > > L1 BIC.B #OFIFG,&IFG1 // Clear OFIFG
> > > MOV #0FFh,R15 // Delay
> > > L2 DEC R15
> > > JNZ L2
> > > BIT.B #OFIFG,&IFG1 // Re?test OFIFG
> > > JNZ L1 // Repeat test if needed
> > > BIS.B #SELM1+SELM0,&BCSCTL2 // Select LFXT1CLK for MCLK
> > > BIS.B #DIVM_2,&BCSCTL2 // Mclk divide by 4
> > > BIS.B #SELS,&BCSCTL2 // Select LFXT1CLK for SMCLK
> > > BIS.B #DIVS_3,&BCSCTL2 // SMClk divide by 8
> > > ret
> > > endproc
> > >
> > > Thanks in advance.
> > >
>
Reply by ●February 9, 20092009-02-09
ti2tt,
OCY is correct. The spec isn't clear on this matter, but I just tried
commenting out the code for "Activate the XT2 XTAL" in the following code,
and did not get anything on the ACLK output pin (P5.6). I read the spec and
interpreted it the same as you did. I thought that you should be able to
route ACLK (or VLOCLK) to SMCLK, but it appears that is only true if the
MSP430 chip does NOT support the XT2 crystal. I tried this on a F2618 chip
mounted in TI's 64-pin socket board, which came with the 32 kHz LFXT1, and
on which I mounted a 3.8684 mHz XT2.
After spending some time learning how to use the serial port, my project is
now moving along pretty rapidly. I'm now up to 30K of Flash usage and 7K of
RAM, on a data collection project. The product that I am upgrading was
originally done on a 8051 variant, using the Keil Compiler. Even though the
original code was in C, it isn't a trivial task to move that to another
embedded controller chip using a different brand of compiler. And, to take
advantage of the MSP430's lower-power features -- well, that's another story
(and learning curve!). Anybody tried using buffered, interrupt-driven serial
output, using DMA to transfer from buffer to serial port? I'm also looking
at an interrupt triggering A/D conversion, which, when complete, utilizes
DMA to move the results into place.
Jim Smith
void Clocks_init(void) {
//***** Activate the XT2 Xtal (3.8684mHz)
**************************************
BCSCTL1 &= ~XT2OFF; // Activate XT2 high freq xtal
BCSCTL3 |= XT2S_2; // 3 16MHz crystal or resonator
do {
IFG1 &= ~(OFIFG); // Clear OSCFault flag
for (i = 0xFF; i > 0; i--); // Time for flag to set
} while (IFG1 & OFIFG); // Loop until OSCFault flag stays Clear
//***** Choose the Clocks
******************************************************
// Defaults under current settings:
// ACLK = LFXT1 = 32 kHz Default when LFXT1 XTAL installed
// MCLC = DCO = 1 mHz Defaults to DCO, which defaults to 1mHz
// SMCLK = DCO = 1 mHz Defaults to DCO
BCSCTL2 |= (SELS); // SMCLK = XT2 HF XTAL if activated (safe)
// (LFXT1CLK or VLOCLK when XT2 osc not present)
// We now have Clocks set to:
// ACLK = LFXT1 = 32 kHz We will use this for Timer_B clock
// MCLK = DCO = 1 mHz CPU Clock (Defaults to DCO)
// SMCLK = XT2 = 3.6864 mHz We will use this for Timer_A clock
//***** Send Clocks to port pins for viewing with scope
************************
P5SEL |= (BIT4 | BIT5 | BIT6); // P5.6,5,4 options (ACLK, SMCLK, MCLK)
} // End Clocks_init()
_____
From: m... [mailto:m...] On Behalf Of
old_cow_yellow
Sent: Monday, February 09, 2009 3:17 AM
To: m...
Subject: [msp430] Re: MSP430 Clock module
You misread or misinterpreted that statement in the User's Guide.
For MSP430F2418, there is a XT2 oscillator. Thus the phase "XT2
oscillator present" is TRUE.
--- In msp430@yahoogroups. com, "ti2tt"
wrote:
>
> Hello,
>
> But the user guide for MSP430F2xxx (slau144e.pdf) says that if XT2CLK
> is not present on XT2 oscillator, LFXT1CLK or VLOCLK can be used.
> Please refer to page no. 300 (BCSCTL2 register settings for SMCLK).
> It is not mentioned that only XT2 source is available for SMCLK.
>
> --- In msp430@yahoogroups. com,
"old_cow_yellow"
> wrote:
> >
> > If you want to use external XTAL to source SMCLK, you have to
> connect
> > it to XT2IN and XT2OUT, not XTIN and XTOUT.
> >
> > --- In msp430@yahoogroups. com,
"ti2tt" wrote:
> > >
> > > Hello forum members,
> > >
> > > I am using MSP430F2418 with CrossStudio. I am outputting all the
> > > three clocks - MCLK, SMCLK and ACLK. When I use DCO, I am able to
> > > output MCLK and SMCLK as ACLK is not available for DCO. But when
> I
> > > use external XTAL (LFXT1), I am able to output only MCLK and
> ACLK.
> > > There is no output on SMCLK pin. Has anyone experienced this
> issue
> > > with SMCLK? Here I am giving the code used, please suggest the
> > > modifications in this if any for SMCLK.
> > >
> > > __SelectCrystalOsc proc
> > > BIC #OSCOFF+SCG1+SCG0+CPUOFF,SR // Turn on osc.
> > > BIS.B #XTS+DIVA_1+XT2OFF,BCSCTL1 //ACLK Divide by 2
> > > BIC.B #LFXT1S1,&BCSCTL3
> > > BIS.B #LFXT1S0,&BCSCTL3
> > > BIC.B #XCAP1+XCAP0,&BCSCTL3
> > > L1 BIC.B #OFIFG,&IFG1 // Clear OFIFG
> > > MOV #0FFh,R15 // Delay
> > > L2 DEC R15
> > > JNZ L2
> > > BIT.B #OFIFG,&IFG1 // Re?test OFIFG
> > > JNZ L1 // Repeat test if needed
> > > BIS.B #SELM1+SELM0,&BCSCTL2 // Select LFXT1CLK for MCLK
> > > BIS.B #DIVM_2,&BCSCTL2 // Mclk divide by 4
> > > BIS.B #SELS,&BCSCTL2 // Select LFXT1CLK for SMCLK
> > > BIS.B #DIVS_3,&BCSCTL2 // SMClk divide by 8
> > > ret
> > > endproc
> > >
> > > Thanks in advance.
> > >
>
No virus found in this incoming message.
Checked by AVG - www.avg.com
Version: 8.0.233 / Virus Database: 270.10.19/1940 - Release Date: 02/08/09
17:57:00
OCY is correct. The spec isn't clear on this matter, but I just tried
commenting out the code for "Activate the XT2 XTAL" in the following code,
and did not get anything on the ACLK output pin (P5.6). I read the spec and
interpreted it the same as you did. I thought that you should be able to
route ACLK (or VLOCLK) to SMCLK, but it appears that is only true if the
MSP430 chip does NOT support the XT2 crystal. I tried this on a F2618 chip
mounted in TI's 64-pin socket board, which came with the 32 kHz LFXT1, and
on which I mounted a 3.8684 mHz XT2.
After spending some time learning how to use the serial port, my project is
now moving along pretty rapidly. I'm now up to 30K of Flash usage and 7K of
RAM, on a data collection project. The product that I am upgrading was
originally done on a 8051 variant, using the Keil Compiler. Even though the
original code was in C, it isn't a trivial task to move that to another
embedded controller chip using a different brand of compiler. And, to take
advantage of the MSP430's lower-power features -- well, that's another story
(and learning curve!). Anybody tried using buffered, interrupt-driven serial
output, using DMA to transfer from buffer to serial port? I'm also looking
at an interrupt triggering A/D conversion, which, when complete, utilizes
DMA to move the results into place.
Jim Smith
void Clocks_init(void) {
//***** Activate the XT2 Xtal (3.8684mHz)
**************************************
BCSCTL1 &= ~XT2OFF; // Activate XT2 high freq xtal
BCSCTL3 |= XT2S_2; // 3 16MHz crystal or resonator
do {
IFG1 &= ~(OFIFG); // Clear OSCFault flag
for (i = 0xFF; i > 0; i--); // Time for flag to set
} while (IFG1 & OFIFG); // Loop until OSCFault flag stays Clear
//***** Choose the Clocks
******************************************************
// Defaults under current settings:
// ACLK = LFXT1 = 32 kHz Default when LFXT1 XTAL installed
// MCLC = DCO = 1 mHz Defaults to DCO, which defaults to 1mHz
// SMCLK = DCO = 1 mHz Defaults to DCO
BCSCTL2 |= (SELS); // SMCLK = XT2 HF XTAL if activated (safe)
// (LFXT1CLK or VLOCLK when XT2 osc not present)
// We now have Clocks set to:
// ACLK = LFXT1 = 32 kHz We will use this for Timer_B clock
// MCLK = DCO = 1 mHz CPU Clock (Defaults to DCO)
// SMCLK = XT2 = 3.6864 mHz We will use this for Timer_A clock
//***** Send Clocks to port pins for viewing with scope
************************
P5SEL |= (BIT4 | BIT5 | BIT6); // P5.6,5,4 options (ACLK, SMCLK, MCLK)
} // End Clocks_init()
_____
From: m... [mailto:m...] On Behalf Of
old_cow_yellow
Sent: Monday, February 09, 2009 3:17 AM
To: m...
Subject: [msp430] Re: MSP430 Clock module
You misread or misinterpreted that statement in the User's Guide.
For MSP430F2418, there is a XT2 oscillator. Thus the phase "XT2
oscillator present" is TRUE.
--- In msp430@yahoogroups. com, "ti2tt"
wrote:
>
> Hello,
>
> But the user guide for MSP430F2xxx (slau144e.pdf) says that if XT2CLK
> is not present on XT2 oscillator, LFXT1CLK or VLOCLK can be used.
> Please refer to page no. 300 (BCSCTL2 register settings for SMCLK).
> It is not mentioned that only XT2 source is available for SMCLK.
>
> --- In msp430@yahoogroups. com,
"old_cow_yellow"
> wrote:
> >
> > If you want to use external XTAL to source SMCLK, you have to
> connect
> > it to XT2IN and XT2OUT, not XTIN and XTOUT.
> >
> > --- In msp430@yahoogroups. com,
"ti2tt" wrote:
> > >
> > > Hello forum members,
> > >
> > > I am using MSP430F2418 with CrossStudio. I am outputting all the
> > > three clocks - MCLK, SMCLK and ACLK. When I use DCO, I am able to
> > > output MCLK and SMCLK as ACLK is not available for DCO. But when
> I
> > > use external XTAL (LFXT1), I am able to output only MCLK and
> ACLK.
> > > There is no output on SMCLK pin. Has anyone experienced this
> issue
> > > with SMCLK? Here I am giving the code used, please suggest the
> > > modifications in this if any for SMCLK.
> > >
> > > __SelectCrystalOsc proc
> > > BIC #OSCOFF+SCG1+SCG0+CPUOFF,SR // Turn on osc.
> > > BIS.B #XTS+DIVA_1+XT2OFF,BCSCTL1 //ACLK Divide by 2
> > > BIC.B #LFXT1S1,&BCSCTL3
> > > BIS.B #LFXT1S0,&BCSCTL3
> > > BIC.B #XCAP1+XCAP0,&BCSCTL3
> > > L1 BIC.B #OFIFG,&IFG1 // Clear OFIFG
> > > MOV #0FFh,R15 // Delay
> > > L2 DEC R15
> > > JNZ L2
> > > BIT.B #OFIFG,&IFG1 // Re?test OFIFG
> > > JNZ L1 // Repeat test if needed
> > > BIS.B #SELM1+SELM0,&BCSCTL2 // Select LFXT1CLK for MCLK
> > > BIS.B #DIVM_2,&BCSCTL2 // Mclk divide by 4
> > > BIS.B #SELS,&BCSCTL2 // Select LFXT1CLK for SMCLK
> > > BIS.B #DIVS_3,&BCSCTL2 // SMClk divide by 8
> > > ret
> > > endproc
> > >
> > > Thanks in advance.
> > >
>
No virus found in this incoming message.
Checked by AVG - www.avg.com
Version: 8.0.233 / Virus Database: 270.10.19/1940 - Release Date: 02/08/09
17:57:00
Reply by ●February 9, 20092009-02-09
"Jim Smith" :
> I'm also looking at an interrupt triggering A/D
> conversion, which, when complete, utilizes DMA to move the results into
> place.
The ADC can sample directly into RAM using the DMA. No interrupt needed at
all, works flawlessly :-). I also need much RAM. 8k are not enough for all
the buffers: ADC buffer, graphics buffer, FAT buffers and so on ...
M.
> I'm also looking at an interrupt triggering A/D
> conversion, which, when complete, utilizes DMA to move the results into
> place.
The ADC can sample directly into RAM using the DMA. No interrupt needed at
all, works flawlessly :-). I also need much RAM. 8k are not enough for all
the buffers: ADC buffer, graphics buffer, FAT buffers and so on ...
M.
Reply by ●February 9, 20092009-02-09
Usually, when you switch to a package type with fewer pins you cannot
access some of the signals any more. This is expected if there are not
enough pins.
But, when you switch to a package type with more pins, loosing some of
the signals is disappointing and unexpected.
For MSP430F241x and F261x, the 113-pin BGA package type do not have
XT2IN and XT2OUT pins. These two pins exist only in package types with
less pins!
access some of the signals any more. This is expected if there are not
enough pins.
But, when you switch to a package type with more pins, loosing some of
the signals is disappointing and unexpected.
For MSP430F241x and F261x, the 113-pin BGA package type do not have
XT2IN and XT2OUT pins. These two pins exist only in package types with
less pins!
Reply by ●February 9, 20092009-02-09
Matthias,
Thanks for your input. I am looking at sampling 4 A-D inputs at 1/second
rate and putting the results in an array, int A-D_Samples[360][4]; so that
further processing can be done later. Will I be able to store the samples in
the array and increment the pointer(s) to next 4-sample set, without CPU
intervention?
The 8K RAM of the F2[46]xx series has me seriously considering the F5xx
series, which has 16K RAM. I can fit what I need into the 8K RAM, but it
doesn't leave me much wiggle-room for the future!
_____
From: m... [mailto:m...] On Behalf Of
Matthias Weingart
Sent: Monday, February 09, 2009 11:06 AM
To: m...
Subject: [msp430] RE: Re: MSP430 Clock module
"Jim Smith" rr.com>:
> I'm also looking at an interrupt triggering A/D
> conversion, which, when complete, utilizes DMA to move the results into
> place.
The ADC can sample directly into RAM using the DMA. No interrupt needed at
all, works flawlessly :-). I also need much RAM. 8k are not enough for all
the buffers: ADC buffer, graphics buffer, FAT buffers and so on ...
M.
No virus found in this incoming message.
Checked by AVG - www.avg.com
Version: 8.0.233 / Virus Database: 270.10.19/1940 - Release Date: 02/08/09
17:57:00
Thanks for your input. I am looking at sampling 4 A-D inputs at 1/second
rate and putting the results in an array, int A-D_Samples[360][4]; so that
further processing can be done later. Will I be able to store the samples in
the array and increment the pointer(s) to next 4-sample set, without CPU
intervention?
The 8K RAM of the F2[46]xx series has me seriously considering the F5xx
series, which has 16K RAM. I can fit what I need into the 8K RAM, but it
doesn't leave me much wiggle-room for the future!
_____
From: m... [mailto:m...] On Behalf Of
Matthias Weingart
Sent: Monday, February 09, 2009 11:06 AM
To: m...
Subject: [msp430] RE: Re: MSP430 Clock module
"Jim Smith" rr.com>:
> I'm also looking at an interrupt triggering A/D
> conversion, which, when complete, utilizes DMA to move the results into
> place.
The ADC can sample directly into RAM using the DMA. No interrupt needed at
all, works flawlessly :-). I also need much RAM. 8k are not enough for all
the buffers: ADC buffer, graphics buffer, FAT buffers and so on ...
M.
No virus found in this incoming message.
Checked by AVG - www.avg.com
Version: 8.0.233 / Virus Database: 270.10.19/1940 - Release Date: 02/08/09
17:57:00
Reply by ●February 10, 20092009-02-10
"Jim Smith" :
> Matthias,
>
> Thanks for your input. I am looking at sampling 4 A-D inputs at 1/second
> rate and putting the results in an array, int A-D_Samples[360][4]; so
> that further processing can be done later. Will I be able to store the
> samples in the array and increment the pointer(s) to next 4-sample set,
> without CPU intervention?
Yes you can, but with 1Hz use the interrupt. Much easier. The DMA is for
100kHz or so...
M.
> Matthias,
>
> Thanks for your input. I am looking at sampling 4 A-D inputs at 1/second
> rate and putting the results in an array, int A-D_Samples[360][4]; so
> that further processing can be done later. Will I be able to store the
> samples in the array and increment the pointer(s) to next 4-sample set,
> without CPU intervention?
Yes you can, but with 1Hz use the interrupt. Much easier. The DMA is for
100kHz or so...
M.
Reply by ●February 11, 20092009-02-11
Dear members,
Yes.......It is true that SMCLK is available only from DCO or XT2 (if
XT2 is present on chip). The word "on chip" is very important here. I
also tested this by connecting a XTAL to XT2 and outputting SMCLK as
previous and it works.
Thank you very much for your kind support particularly
Old_Cow_Yellow. Keep supporting....
ti2tt
--- In m..., "Jim Smith" wrote:
>
> ti2tt,
>
> OCY is correct. The spec isn't clear on this matter, but I just
tried
> commenting out the code for "Activate the XT2 XTAL" in the
following code,
> and did not get anything on the ACLK output pin (P5.6). I read the
spec and
> interpreted it the same as you did. I thought that you should be
able to
> route ACLK (or VLOCLK) to SMCLK, but it appears that is only true
if the
> MSP430 chip does NOT support the XT2 crystal. I tried this on a
F2618 chip
> mounted in TI's 64-pin socket board, which came with the 32 kHz
LFXT1, and
> on which I mounted a 3.8684 mHz XT2.
>
> After spending some time learning how to use the serial port, my
project is
> now moving along pretty rapidly. I'm now up to 30K of Flash usage
and 7K of
> RAM, on a data collection project. The product that I am upgrading
was
> originally done on a 8051 variant, using the Keil Compiler. Even
though the
> original code was in C, it isn't a trivial task to move that to
another
> embedded controller chip using a different brand of compiler. And,
to take
> advantage of the MSP430's lower-power features -- well, that's
another story
> (and learning curve!). Anybody tried using buffered, interrupt-
driven serial
> output, using DMA to transfer from buffer to serial port? I'm also
looking
> at an interrupt triggering A/D conversion, which, when complete,
utilizes
> DMA to move the results into place.
>
> Jim Smith
>
> void Clocks_init(void) {
> //***** Activate the XT2 Xtal (3.8684mHz)
> **************************************
> BCSCTL1 &= ~XT2OFF; // Activate XT2 high freq xtal
> BCSCTL3 |= XT2S_2; // 3 16MHz crystal or
resonator
> do {
> IFG1 &= ~(OFIFG); // Clear OSCFault flag
> for (i = 0xFF; i > 0; i--); // Time for flag to set
> } while (IFG1 & OFIFG); // Loop until OSCFault flag
stays Clear
> //***** Choose the Clocks
> ******************************************************
> // Defaults under current settings:
> // ACLK = LFXT1 = 32 kHz Default when LFXT1 XTAL installed
> // MCLC = DCO = 1 mHz Defaults to DCO, which defaults to
1mHz
> // SMCLK = DCO = 1 mHz Defaults to DCO
> BCSCTL2 |= (SELS); // SMCLK = XT2 HF XTAL if activated (safe)
> // (LFXT1CLK or VLOCLK when XT2 osc not
present)
> // We now have Clocks set to:
> // ACLK = LFXT1 = 32 kHz We will use this for Timer_B
clock
> // MCLK = DCO = 1 mHz CPU Clock (Defaults to DCO)
> // SMCLK = XT2 = 3.6864 mHz We will use this for Timer_A
clock
> //***** Send Clocks to port pins for viewing with scope
> ************************
> P5SEL |= (BIT4 | BIT5 | BIT6); // P5.6,5,4 options (ACLK,
SMCLK, MCLK)
> } // End Clocks_init()
>
> _____
>
> From: m... [mailto:m...] On
Behalf Of
> old_cow_yellow
> Sent: Monday, February 09, 2009 3:17 AM
> To: m...
> Subject: [msp430] Re: MSP430 Clock module
>
>
>
> You misread or misinterpreted that statement in the User's Guide.
>
> For MSP430F2418, there is a XT2 oscillator. Thus the phase "XT2
> oscillator present" is TRUE.
>
> --- In msp430@yahoogroups.
com, "ti2tt"
> wrote:
> >
> > Hello,
> >
> > But the user guide for MSP430F2xxx (slau144e.pdf) says that if
XT2CLK
> > is not present on XT2 oscillator, LFXT1CLK or VLOCLK can be used.
> > Please refer to page no. 300 (BCSCTL2 register settings for
SMCLK).
> > It is not mentioned that only XT2 source is available for SMCLK.
> >
> > --- In msp430@yahoogroups. com,
> "old_cow_yellow"
> > wrote:
> > >
> > > If you want to use external XTAL to source SMCLK, you have to
> > connect
> > > it to XT2IN and XT2OUT, not XTIN and XTOUT.
> > >
> > > --- In msp430@yahoogroups.
com,
> "ti2tt" wrote:
> > > >
> > > > Hello forum members,
> > > >
> > > > I am using MSP430F2418 with CrossStudio. I am outputting all
the
> > > > three clocks - MCLK, SMCLK and ACLK. When I use DCO, I am
able to
> > > > output MCLK and SMCLK as ACLK is not available for DCO. But
when
> > I
> > > > use external XTAL (LFXT1), I am able to output only MCLK and
> > ACLK.
> > > > There is no output on SMCLK pin. Has anyone experienced this
> > issue
> > > > with SMCLK? Here I am giving the code used, please suggest
the
> > > > modifications in this if any for SMCLK.
> > > >
> > > > __SelectCrystalOsc proc
> > > > BIC #OSCOFF+SCG1+SCG0+CPUOFF,SR // Turn on osc.
> > > > BIS.B #XTS+DIVA_1+XT2OFF,BCSCTL1 //ACLK Divide by 2
> > > > BIC.B #LFXT1S1,&BCSCTL3
> > > > BIS.B #LFXT1S0,&BCSCTL3
> > > > BIC.B #XCAP1+XCAP0,&BCSCTL3
> > > > L1 BIC.B #OFIFG,&IFG1 // Clear OFIFG
> > > > MOV #0FFh,R15 // Delay
> > > > L2 DEC R15
> > > > JNZ L2
> > > > BIT.B #OFIFG,&IFG1 // Re?test OFIFG
> > > > JNZ L1 // Repeat test if needed
> > > > BIS.B #SELM1+SELM0,&BCSCTL2 // Select LFXT1CLK for MCLK
> > > > BIS.B #DIVM_2,&BCSCTL2 // Mclk divide by 4
> > > > BIS.B #SELS,&BCSCTL2 // Select LFXT1CLK for SMCLK
> > > > BIS.B #DIVS_3,&BCSCTL2 // SMClk divide by 8
> > > > ret
> > > > endproc
> > > >
> > > > Thanks in advance.
> > > >
> > >
> >
>
>
>
>
>
> No virus found in this incoming message.
> Checked by AVG - www.avg.com
> Version: 8.0.233 / Virus Database: 270.10.19/1940 - Release Date:
02/08/09
> 17:57:00
>
>
>
>
>
>
Yes.......It is true that SMCLK is available only from DCO or XT2 (if
XT2 is present on chip). The word "on chip" is very important here. I
also tested this by connecting a XTAL to XT2 and outputting SMCLK as
previous and it works.
Thank you very much for your kind support particularly
Old_Cow_Yellow. Keep supporting....
ti2tt
--- In m..., "Jim Smith" wrote:
>
> ti2tt,
>
> OCY is correct. The spec isn't clear on this matter, but I just
tried
> commenting out the code for "Activate the XT2 XTAL" in the
following code,
> and did not get anything on the ACLK output pin (P5.6). I read the
spec and
> interpreted it the same as you did. I thought that you should be
able to
> route ACLK (or VLOCLK) to SMCLK, but it appears that is only true
if the
> MSP430 chip does NOT support the XT2 crystal. I tried this on a
F2618 chip
> mounted in TI's 64-pin socket board, which came with the 32 kHz
LFXT1, and
> on which I mounted a 3.8684 mHz XT2.
>
> After spending some time learning how to use the serial port, my
project is
> now moving along pretty rapidly. I'm now up to 30K of Flash usage
and 7K of
> RAM, on a data collection project. The product that I am upgrading
was
> originally done on a 8051 variant, using the Keil Compiler. Even
though the
> original code was in C, it isn't a trivial task to move that to
another
> embedded controller chip using a different brand of compiler. And,
to take
> advantage of the MSP430's lower-power features -- well, that's
another story
> (and learning curve!). Anybody tried using buffered, interrupt-
driven serial
> output, using DMA to transfer from buffer to serial port? I'm also
looking
> at an interrupt triggering A/D conversion, which, when complete,
utilizes
> DMA to move the results into place.
>
> Jim Smith
>
> void Clocks_init(void) {
> //***** Activate the XT2 Xtal (3.8684mHz)
> **************************************
> BCSCTL1 &= ~XT2OFF; // Activate XT2 high freq xtal
> BCSCTL3 |= XT2S_2; // 3 16MHz crystal or
resonator
> do {
> IFG1 &= ~(OFIFG); // Clear OSCFault flag
> for (i = 0xFF; i > 0; i--); // Time for flag to set
> } while (IFG1 & OFIFG); // Loop until OSCFault flag
stays Clear
> //***** Choose the Clocks
> ******************************************************
> // Defaults under current settings:
> // ACLK = LFXT1 = 32 kHz Default when LFXT1 XTAL installed
> // MCLC = DCO = 1 mHz Defaults to DCO, which defaults to
1mHz
> // SMCLK = DCO = 1 mHz Defaults to DCO
> BCSCTL2 |= (SELS); // SMCLK = XT2 HF XTAL if activated (safe)
> // (LFXT1CLK or VLOCLK when XT2 osc not
present)
> // We now have Clocks set to:
> // ACLK = LFXT1 = 32 kHz We will use this for Timer_B
clock
> // MCLK = DCO = 1 mHz CPU Clock (Defaults to DCO)
> // SMCLK = XT2 = 3.6864 mHz We will use this for Timer_A
clock
> //***** Send Clocks to port pins for viewing with scope
> ************************
> P5SEL |= (BIT4 | BIT5 | BIT6); // P5.6,5,4 options (ACLK,
SMCLK, MCLK)
> } // End Clocks_init()
>
> _____
>
> From: m... [mailto:m...] On
Behalf Of
> old_cow_yellow
> Sent: Monday, February 09, 2009 3:17 AM
> To: m...
> Subject: [msp430] Re: MSP430 Clock module
>
>
>
> You misread or misinterpreted that statement in the User's Guide.
>
> For MSP430F2418, there is a XT2 oscillator. Thus the phase "XT2
> oscillator present" is TRUE.
>
> --- In msp430@yahoogroups.
com, "ti2tt"
> wrote:
> >
> > Hello,
> >
> > But the user guide for MSP430F2xxx (slau144e.pdf) says that if
XT2CLK
> > is not present on XT2 oscillator, LFXT1CLK or VLOCLK can be used.
> > Please refer to page no. 300 (BCSCTL2 register settings for
SMCLK).
> > It is not mentioned that only XT2 source is available for SMCLK.
> >
> > --- In msp430@yahoogroups. com,
> "old_cow_yellow"
> > wrote:
> > >
> > > If you want to use external XTAL to source SMCLK, you have to
> > connect
> > > it to XT2IN and XT2OUT, not XTIN and XTOUT.
> > >
> > > --- In msp430@yahoogroups.
com,
> "ti2tt" wrote:
> > > >
> > > > Hello forum members,
> > > >
> > > > I am using MSP430F2418 with CrossStudio. I am outputting all
the
> > > > three clocks - MCLK, SMCLK and ACLK. When I use DCO, I am
able to
> > > > output MCLK and SMCLK as ACLK is not available for DCO. But
when
> > I
> > > > use external XTAL (LFXT1), I am able to output only MCLK and
> > ACLK.
> > > > There is no output on SMCLK pin. Has anyone experienced this
> > issue
> > > > with SMCLK? Here I am giving the code used, please suggest
the
> > > > modifications in this if any for SMCLK.
> > > >
> > > > __SelectCrystalOsc proc
> > > > BIC #OSCOFF+SCG1+SCG0+CPUOFF,SR // Turn on osc.
> > > > BIS.B #XTS+DIVA_1+XT2OFF,BCSCTL1 //ACLK Divide by 2
> > > > BIC.B #LFXT1S1,&BCSCTL3
> > > > BIS.B #LFXT1S0,&BCSCTL3
> > > > BIC.B #XCAP1+XCAP0,&BCSCTL3
> > > > L1 BIC.B #OFIFG,&IFG1 // Clear OFIFG
> > > > MOV #0FFh,R15 // Delay
> > > > L2 DEC R15
> > > > JNZ L2
> > > > BIT.B #OFIFG,&IFG1 // Re?test OFIFG
> > > > JNZ L1 // Repeat test if needed
> > > > BIS.B #SELM1+SELM0,&BCSCTL2 // Select LFXT1CLK for MCLK
> > > > BIS.B #DIVM_2,&BCSCTL2 // Mclk divide by 4
> > > > BIS.B #SELS,&BCSCTL2 // Select LFXT1CLK for SMCLK
> > > > BIS.B #DIVS_3,&BCSCTL2 // SMClk divide by 8
> > > > ret
> > > > endproc
> > > >
> > > > Thanks in advance.
> > > >
> > >
> >
>
>
>
>
>
> No virus found in this incoming message.
> Checked by AVG - www.avg.com
> Version: 8.0.233 / Virus Database: 270.10.19/1940 - Release Date:
02/08/09
> 17:57:00
>
>
>
>
>
>
