We try to trigger the ADC12 with either timer by setting SHS<>0. That doesn't seam to work. Per documentation either timerA.out1 or timerB.out0 or timerB.out1 can be used to start a conversion. Anybody have a sample that shows how this works ? The goals is to have the ADC12 take a sample based on the timer reaching a certain count. Yes, one could deal with that from within the timer IRQ routine, but then what is the SHS selector for ? Thanks for all your help & insight (ahead of time). rb
trigger ADC12 with timer
Started by ●September 22, 2003
Reply by ●September 23, 20032003-09-23
What are your other settings? for example if you have SHP = 0 the sample timing is controlled by the length of the SHI pulse, ie your selected timer control. Unless you have set this for PWM type operation the sample period never completes. If you were relying on your ADC interrupt, for example, to clear the state of the timer control (since the timed trigger is based on OUTx NOT EQUx) your ADC can't operate, since the sample period doesn't complete, the conversion never starts and the ADC int never happens. Al
Reply by ●September 24, 20032003-09-24
--- In msp430@msp4..., onestone <onestone@b...> wrote:
What are your other settings? for example if you have SHP = 0 the
sample timing is controlled by the length of the SHI pulse, ie your
selected timer control. Unless you have set this for PWM type
operation the sample period never completes. If you were relying on
your ADC interrupt, for example, to clear the state of the timer
control (since the timed trigger is based on OUTx NOT EQUx) your ADC
can't operate, since the sample period doesn't complete, the
conversion never starts and the ADC int never happens.
>
> Al
Here are the settings:
// timer_A setup
TACTL = TASSEL0 + TACLR; // ACLK for timer_A
TACCR0 = 0x7FFF; // period for up count 1 sec
TACTL |= MC0; // start timer_A in up mode, reset reaching CCR0
// capture register CCR1 used for timer_A.out1
TACCR1 = 0x1000; // CCR1 value -> EQUx
TACCTL1 = OUTMOD_3; // CCR1 setup
ADC12CTL0 = ADC12ON +REFON+REF2_5V+SHT0_2;
ADC12CTL1 = SHP + CONSEQ_2;
ADC12CTL1 |= SHS_1; // use timer_A.out as sampling trigger
ADC12MCTL0 = INCH_10+SREF_1+EOS; // select A10(temperature)
ADC12IE = 0x01; // Enable ADC12IFG.1
ADC12CTL0 |= ENC; // Enable conversions
ADC12CTL0 |= ADC12SC; // Start conversion - once
Did I miss something ?
Thanks
rb
Reply by ●September 24, 20032003-09-24
rbuerli wrote: > --- In msp430@msp4..., onestone <onestone@b...> wrote: > What are your other settings? for example if you have SHP = 0 the > sample timing is controlled by the length of the SHI pulse, ie your > selected timer control. Unless you have set this for PWM type > operation the sample period never completes. If you were relying on > your ADC interrupt, for example, to clear the state of the timer > control (since the timed trigger is based on OUTx NOT EQUx) your ADC > can't operate, since the sample period doesn't complete, the > conversion never starts and the ADC int never happens. > >>Al > > > Here are the settings: > // timer_A setup > TACTL = TASSEL0 + TACLR; // ACLK for timer_A > TACCR0 = 0x7FFF; // period for up count 1 sec > TACTL |= MC0; // start timer_A in up mode, reset reaching CCR0 > // capture register CCR1 used for timer_A.out1 > TACCR1 = 0x1000; // CCR1 value -> EQUx > TACCTL1 = OUTMOD_3; // CCR1 setup Timer A set up looks fine, A simple PWM that sets out1 on CCR1 and resets it on CCR0/overflow. > > ADC12CTL0 = ADC12ON +REFON+REF2_5V+SHT0_2; > ADC12CTL1 = SHP + CONSEQ_2; You have selected repeat single channel mode, but have failed to set MSC in ADC12CTL0. > ADC12CTL1 |= SHS_1; // use timer_A.out as sampling trigger > > ADC12MCTL0 = INCH_10+SREF_1+EOS; // select A10(temperature) This looks OK. > ADC12IE = 0x01; // Enable ADC12IFG.1 > ADC12CTL0 |= ENC; // Enable conversions > ADC12CTL0 |= ADC12SC; // Start conversion - once > > Did I miss something ? Just the MSC bit it seems, and you failed to clear the ADC12IFG flag, before your controlled conversion. Al > Thanks > rb > > > > . > > > > ">http://docs.yahoo.com/info/terms/ > > >