I'm going to find out soon enough (it's not crucial that I
know before doing the design and writing the critical part of
the software), but I'm curious if anyone has explored what
happens to SCCI during capture mode.

Reading the Family Guide's Figure 12-1 on page 365 suggests
to me that there is a "possibility" that it is affected
(which is slightly nicer for me, if so.) I have a signal
coming in on CCI1A (P1.2 on the part I'm looking at right
now) where I want to capture on both rising and falling
edges. (The difference tells me the pulse width.) The
question is if the SCCI state will reflect a copy of the
post-edge detection value of the pin, or not.

The way I read Figure 12-1 is that CCI1A is selected by the
mux and is present at the A input of the SCCI latch, while
the capture mode edge is recognized and used to trigger
TACCRx to snap a copy of TAR. I would guess that the
comparator is combinatorial and will cause an active EQUx
line (because obviously, once you copy TAR into TACCRx they
are now equal to each other!) which should then cause the
SCCI latch to propagate the CCI line (mux selected so it is
the value of the CCI1A line or P1.2 at the moment when EQUx
is asserted.) Then, in the next TAR clocking event, EQUx is
no longer active and so SCCI should hold the value it last
saw before EQUx became inactive.

I should then be able to read SCCI to see if this is a rising
or falling edge... so to speak... independently of my keeping
a separate state variable for the purpose.

Anyone been there before and know for sure?

Thanks,
Jon
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