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Re: BSL WITH MSP430F5437A

Started by "ant...@gmail.com" October 23, 2013
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;*********************** PROGRAM TRANSFER CODE
******************************
;THE XFRCODE MUST BE MOVED FROM FLASH TO RAM AND THEN EXECUTED FROM RAM.
THIS
;CODE IS PART OF THE OBJECT CODE THAT WILL BE ERASED WHEN THE FLASH MEMORY
IS
;ERASED.

XFRCOD: DINT
;DISABLE INTERRUPTS
CLR.B &CNTER1
;COUNTER FOR BLOCK MEMORY ACCESS

;----------- CLEAR BANK B OF FLASH MEMORY ------------------------------

MOVX.A #10000H,R15

MOV.W #0A500H,&FCTL3
;CLEAR LOCK BIT
MOV.W #(0A500H+MERAS),&FCTL1
;SETUP FOR MASS ERASE
MOVX.A #0,0(R15)
;DUMMY WRITE TO START ERASE

L1: BIT.W #BUSY,&FCTL3
; Check if Flash being used
JNZ L1

;----------- CLEAR BANK C OF FLASH MEMORY ------------------------------

MOVX.A #20000H,R15

MOV.W #0A500H,&FCTL3
;CLEAR LOCK BIT
MOV.W #(0A500H+MERAS),&FCTL1
;SETUP FOR MASS ERASE
MOVX.A #0,0(R15)
;DUMMY WRITE TO START ERASE

L2: BIT.W #BUSY,&FCTL3
; Check if Flash being used
JNZ L2
;----------- CLEAR BANK D OF FLASH MEMORY ------------------------------

MOVX.A #30000H,R15

MOV.W #0A500H,&FCTL3
;CLEAR LOCK BIT
MOV.W #(0A500H+MERAS),&FCTL1
;SETUP FOR MASS ERASE
MOVX.A #0,0(R15)
;DUMMY WRITE TO START ERASE

L3: BIT.W #BUSY,&FCTL3
; Check if Flash being used
JNZ L3
;

MOV.W #0A585H,&FCTL1
;SMCLK/5+1 = 371KHZ (2.23 MHZ/6 = 371 KHZ)
MOV.W #0A500H,&FCTL3
;CLEAR LOCK BIT

MOV.W #(0A500H+MERAS),&FCTL1
;SETUP FOR MASS ERASE
CLR.W &EXSTRT
;DUMMY WRITE TO START ERASE

XFRC00: BIT.W #BUSY,&FCTL3
;BUSY?
JNZ XFRC00 ; YES

;NO

MOV.W #0A500H,&FCTL1
; PRECAUTION..CLR MASS ERASE BIT
MOV.W #(0A500H+LOCK),&FCTL3
;SET LOCK BIT

;SETUP T0 RD 64 EEP BYTE GROUPS TO BUF
; AND THEN TO WRT 32 WORD BLOCKS TO
; FLASH MEMORY

MOV.W #5C00H,R6
;FLASH MEMORY START ADDRESS
MOV.W #1000H,R10
;EEPROM CODE START ADDRESS

XFRC01: MOV.W #BUFFER,R11
;BUFFER START ADDRESS
MOV.W #(BUFFER+64),R12
;BUFFER STOP ADDRESS FOR 64 BYTES
;--------------- READ 64 BYTES FROM EEPROM ---------------------------------
XFRC02: BIC.B #BIT1,&P3OUT
;OUT LATCH LOW FOR ACK REPLY TO DATA
MOV.B #008H,R14
;BIT CTR
CLR R15
;CLR RCVE DATA ACCUM REG

XFRC03: BIC.B #BIT2,&P3OUT
;CLOCK LOW
TST.B R14
;8 BITS TRANSFERRED?
JZ XFRC04
; YES .. BYTE RCVD

;NO
DEC.B R14
;DECREMENT CTR
BIS.B #BIT2,&P3OUT
;CLK HI
NOP
; ..
BIT.B #BIT1,&P3IN
;TEST INP BIT (CARRY BIT=HI, IF 1)
RLC.B R15
;SHIFT CARRY TO BIT0 OF R15
JMP XFRC03
;GET NEXT BIT

XFRC04: MOV.B R15,0(R11)
;MOVE BYTE TO RAM
INC.W R11
;NEXT RAM ADDRESS
CMP.W R12,R11
;64 BYTES TRANSFERRED TO BUFFER?
JLO XFRC05
; NO

;YES
CMP.W #0FF80H,R10
;VECTOR BLOCK 1?
JEQ XFRC05
; YES ..GO GENERATE NOACK & STOP
COND'N

;NO
CMP.W #0FFC0H,R10
;VECTOR BLOCK 2?
JEQ XFRC06
; YES ..GO GENERATE NOACK & STOP
COND'N

;NO
;----

XFRC05: BIS.B #BIT1,&P3DIR
;SET DATA PORT TO OUTP FOR ACK REPLY
NOP
BIS.B #BIT2,&P3OUT
;CLK HI
BIS.B #BIT2,&P3OUT
;DELAY
BIC.B #BIT2,&P3OUT
;CLK LOW .. TERMINATE ACK 9TH INTERVAL
BIC.B #BIT1,&P3DIR
;DATA PORT TO INP

CMP.W R12,R11
;64 BYTES IN BUFFER?
JLO XFRC02
; NO

;YES
JMP XFRC07 ; ..
;----
;LAST BYTE RECEIVED FROM EEPROM
; GENERATE NOACK AND STOP

XFRC06: BIS.B #BIT2,&P3OUT
;CLOCK HI
NOP
; DATA IS HI BECAUSE OF
PULLUP
BIC.B #BIT2,&P3OUT
;CLOCK LOW
BIS.B #BIT1,&P3DIR
;DATA PORT TO OUTP WILL GO LOW
NOP
NOP
BIS.B #BIT2,&P3OUT
;CLOCK HI
NOP
NOP
BIS.B #BIT1,&P3OUT
;DATA HI WITH CLK HI = STOP

;--
XFRC07: CMP.W #0FF80H,R10
;HAS 64 BYTE VECTOR AREA BEEN REACHED?
JEQ XFRC7A
; NO

;YES
CMP.W #0FFC0H,R10
;HAS 64 BYTE VECTOR AREA BEEN REACHED?
JNE XFRC08
; NO

;YES
MOV.W #0FFC0H,R6
;FLASH ADDRESS FOR VECTORS 2
JMP XFRC09

XFRC7A: MOV.W #0FF80H,R6
;FLASH ADDRESS FOR VECTORS 1
JMP XFRC09

XFRC08: CMP.W &HRADR1,R10
;HRADDR=LAST DATA BLOCK +1, BYTE ADDR

;HAS PRGRM
DATA END BEEN REACHED?
JLO XFRC09
; NO

;YES
ADD.W #0064,R10
;UPDATE EEPROM ADDRESS
JMP XFRC01
;(RD BLOCKS BUT NO XFER TO
FLASH

; UNTIL 0EF4H IS
REACHED)
;---

;WRITE TO FLASH
XFRC09: MOV.W #BUFFER,R11
;RE-ESTABLISH BUFFER START

BIT.W #BUSY,&FCTL3
;BUSY?
JNZ XFRC09
; YES

;NO
MOV.W #(0A500H+BLKWRT+WRT),&FCTL1
;ENABLE BLOCK WRITE
MOV.W #0A500H,&FCTL3
;CLEAR LOCK BIT

XFRC10: MOV.W @R11+,0(R6)
;WRITE WORD TO FLASH

XFRC11: BIT.W #WAIT,&FCTL3
;WAIT?
JZ XFRC11
; YES

;NO
INCD R6
;NEXT WORD ADDRESS
CMP.W R12,R11
;32 WORDS TRANSFERRED? (END
OF BLOCK)
JLO XFRC10
; NO

;YES
MOV.W #0A500H,&FCTL1
;CLR WRT AND BLKWRT
MOV.W #(0A500H+LOCK),&FCTL3
;SET LOCK BIT

XFRC12: BIT.W #BUSY,&FCTL3
;BUSY?
JNZ XFRC12
; YES

;NO
;----

ADD.W #0064,R10
;ADD 64 BYTES TO EEPROM ADDRESS

TST.W R6
;DID FLASH ADDRESS
ROLL TO 00?
JNZ XFRC01
; NO


;----

RAGAIN: INC.B &CNTER1

CMP.B #01H,&CNTER1
JNE RAGA02
MOVX.A #10000H,R6
; FLASH AT 10000H
MOV.B #0A2H,&WRBYTE
MOV.B #0A3H,&RDBYTE
JMP XFRC20
RAGA02: CMP.B #02H,&CNTER1
JNE RAGA03
MOVX.A #20000H,R6
; FLASH AT 20000H
MOV.B #0A4H,&WRBYTE
MOV.B #0A5H,&RDBYTE
JMP XFRC20
RAGA03: CMP.B #03H,&CNTER1
JNE XFRCND
MOVX.A #30000H,R6
; FLASH AT 30000H
MOV.B #0A6H,&WRBYTE
MOV.B #0A7H,&RDBYTE

;----

; LOAD SECOND 512k EEPROM ADDRESS
;----

XFRC20: CLR.W R10
;START AT ADDRESS 0 OF UPPER EEPROM
BIS.B #BIT2,&P3OUT
;Set the clock high for the START Condition
BIS.B #BIT1,&P3DIR
;HI TO LO XISTION WITH CLK HI = START
CONDIT'N
BIS.B #BIT1,&P3OUT
;HI TO LO XISTION WITH CLK HI = START
CONDIT'N
BIS.B #BIT1,&P3OUT
;HI TO LO XISTION WITH CLK HI = START
CONDIT'N
NOP
BIC.B #BIT2,&P3OUT
;HI TO LO XISTION WITH CLK HI = START
CONDIT'N

XFR20A: BIC.B #BIT1,&P3OUT
;HI TO LO XISTION WITH CLK HI = START CONDIT'N
;------------- LOAD DEVICE ADDRESS

MOV.B &WRBYTE,R15
;LOAD DEVICE ADDRESS TO READ TO R15
MOV.B #0008H,R14
;SETUP CTR FOR 8 BITS

EEIN0: BIC.B #BIT2,&P3OUT
;LOWER THE CLOCK
BIT.B #BIT7,R15
;IS BIT 7 HI OR LO?
JNZ EEIN1
; HI

;LO
BIC.B #BIT1,&P3OUT
;DATA LO OUT
JMP EEIN2
; ..

EEIN1: BIS.B #BIT1,&P3OUT
;DATA HI OUT
NOP
; ..

EEIN2: BIS.B #BIT1,&P3DIR
;MAKE A DATA OUT PORT
RLC.B R15
;SHIFT DATA LEFT ONE BIT
BIS.B #BIT2,&P3OUT
;CLOCK HI
NOP

DEC.B R14
;DECREMENT BIT.W CTR
JNZ EEIN0
;NOT 8 BITS YET

; 8 BITS SENT
BIC.B #BIT2,&P3OUT
;LOWER THE CLK FOR 5AH
BIC.B #BIT1,&P3DIR
;MAKE A DATA IN PORT
NOP
;PAD
BIS.B #BIT2,&P3OUT
;RAISE THE CLK
;--

PUSH.W R10
;HOLD ADDRESS ON STACK
SWPB R10
;SWAP HIGH AND LOW BYTES
MOV.B R10,R15
;HI ORDER ADDRESS BYTE TO R15
;-
MOV.B #0008H,R14
;SETUP CTR FOR 8 BITS

EEI10: BIC.B #BIT2,&P3OUT
;LOWER THE CLOCK
BIT.B #BIT7,R15
;IS BIT 7 HI OR LO?
JNZ EEI11
; HI

;LO
BIC.B #BIT1,&P3OUT
;DATA LO OUT
JMP EEI12

EEI11: BIS.B #BIT1,&P3OUT
;DATA HI OUT
NOP

EEI12: BIS.B #BIT1,&P3DIR
;MAKE A DATA OUT PORT
RLC.B R15
;SHIFT DATA LEFT ONE
BIT
BIS.B #BIT2,&P3OUT
;CLOCK HI
NOP
DEC.B R14
;DECREMENT BIT.W CTR
JNZ EEI10
;NOT 8 BITS
YET

; 8 BITS SENT
BIC.B #BIT2,&P3OUT
;LOWER THE CLK FOR 5AH
BIC.B #BIT1,&P3DIR
MAKE A DATA IN PORT
NOP
;PAD
BIS.B #BIT2,&P3OUT
;RAISE THE CLK
;--

POP.W R10
;RECOVER ADDRESS
MOV.B R10,R15
;LOW ORDER ADDRESS BYTE TO R15
;-
MOV.B #0008H,R14
;SETUP CTR FOR 8 BITS

EEI20: BIC.B #BIT2,&P3OUT
;LOWER THE CLOCK
BIT.B #BIT7,R15
;IS BIT 7 HI OR LO?
JNZ EEI21
; HI

;LO
BIC.B #BIT1,&P3OUT
;DATA LO OUT
JMP EEI22

EEI21: BIS.B #BIT1,&P3OUT
;DATA HI OUT
NOP

EEI22: BIS.B #BIT1,&P3DIR
;MAKE A DATA OUT PORT
RLC.B R15
;SHIFT DATA LEFT ONE BIT
BIS.B #BIT2,&P3OUT
; CLOCK HI
NOP
DEC.B R14
;DECREMENT BIT.W CTR
JNZ EEI20
;NOT 8 BITS YET

; 8 BITS SENT
BIC.B #BIT2,&P3OUT
;LOWER THE CLK FOR 5AH
BIC.B #BIT1,&P3DIR
;MAKE A DATA IN PORT
NOP
;PAD
BIS.B #BIT2,&P3OUT
;RAISE THE CLK

;----

BIT.B #BIT1,&P3IN
;TEST INP BIT.W
JNZ EEI23
; HI .. A5H (&RDWRT
BIT7 IS LO = A5H)

;LO
BIS.B #BIT7,&RDWRT
;SET 5AH

EEI23: BIC.B #BIT2,&P3OUT
;LOWER THE CLK TO TERMINATE 5AH/A5H
;--


;READ
MOV.B &RDBYTE,R15
;LOAD DEVICE ADDRESS TO R15
BIS.B #BIT1,&P3OUT
;DATA LATCH TO HI
BIS.B #BIT1,&P3DIR
;PORT P3.1 TO OUT (DATA
STAYS HI)
BIS.B #BIT2,&P3OUT
;CLK TO HI
NOP
NOP
BIC.B #BIT1,&P3OUT
;START COMMAND TO EEPROM
NOP
;-
MOV.B #0008H,R14
;SETUP CTR FOR 8 BITS

EEI30: BIC.B #BIT2,&P3OUT
;LOWER THE CLOCK
BIT.B #BIT7,R15
;IS BIT 7 HI OR LO?
JNZ EEI31
; HI

;LO
BIC.B #BIT1,&P3OUT
;DATA LO OUT
JMP EEI32 ; ..

EEI31: BIS.B #BIT1,&P3OUT
;DATA HI OUT
NOP

EEI32: BIS.B #BIT1,&P3DIR
;MAKE A DATA OUT PORT
RLC.B R15
;SHIFT DATA LEFT
ONE BIT
BIS.B #BIT2,&P3OUT
;CLOCK HI
NOP
DEC.B R14
;DECREMENT BIT.W CTR
JNZ EEI30
;NOT 8 BITS YET

; 8 BITS
SENT
BIC.B #BIT2,&P3OUT
;LOWER THE CLK FOR 5AH
BIC.B #BIT1,&P3DIR
;MAKE A DATA IN PORT
NOP
;PAD
BIS.B #BIT2,&P3OUT
;RAISE THE CLK
;--

XFRC21: MOV.W #BUFFER,R11
;BUFFER START ADDRESS
MOV.W #(BUFFER+64),R12
;BUFFER STOP ADDRESS FOR 64
BYTES

XFRC22: BIC.B #BIT1,&P3OUT
;OUT LATCH LOW FOR ACK REPLY TO DATA
MOV.B #008H,R14
;BIT CTR
CLR.W R15
;CLR RCVE DATA ACCUM
REG

XFRC23: BIC.B #BIT2,&P3OUT
;CLOCK LOW
TST.B R14
;8 BITS TRANSFERRED?
JZ XFRC24
; YES .. BYTE RCVD

;NO
DEC.B R14
;DECREMENT CTR
BIS.B #BIT2,&P3OUT
;CLK HI
NOP .
BIT.B #BIT1,&P3IN
;TEST INP BIT (CARRY
BIT=HI, IF 1)
RLC.B R15
;SHIFT CARRY TO BIT0
OF R15
JMP XFRC23
;GET NEXT BIT

XFRC24: MOV.B R15,0(R11)
;MOVE BYTE TO RAM
INC.W R11
;NEXT RAM ADDRESS
CMP.W R12,R11
;64 BYTES TRANSFERRED TO
BUFFER?
JLO XFRC25
; NO

;YES

CMP.W #0FFC0H,R10
JHS XFRC26

CMP.B &COMCNT,&CNTER1
; THE LAST CODE BLOCK?
JLO XFRC25
; NO..

CMP.W &HRADR2,R10
;END OF EEPROM?
JHS XFRC29
; YES ..GO GENERATE NACK
& STOP COND'N

;NO

XFRC25: BIS.B #BIT1,&P3DIR
;SET DATA PORT TO OUTP FOR ACK
REPLY
NOP
BIS.B #BIT2,&P3OUT
;CLK HI
BIS.B #BIT2,&P3OUT
;DELAY
BIC.B #BIT2,&P3OUT
;CLK LOW .. TERMINATE ACK 9TH
INTERVAL
BIC.B #BIT1,&P3DIR
;DATA PORT TO INP

CMP.W R12,R11
;64 BYTES IN BUFFER?
JLO XFRC22
; NO

;YES

JMP XFRC29
;----------------------
;LAST BYTE RECEIVED FROM EEPROM
; GENERATE NOACK AND STOP

XFRC26: BIS.B #BIT2,&P3OUT
;CLOCK HI
NOP
; DATA
IS HI BECAUSE OF PULLUP
BIC.B #BIT2,&P3OUT
;CLOCK LOW
BIS.B #BIT1,&P3DIR
;DATA PORT TO OUTP
WILL GO LOW
NOP
NOP
BIS.B #BIT2,&P3OUT
;CLOCK HI
NOP
NOP
BIS.B #BIT1,&P3OUT
; DATA HI WITH CLK
HI = STOP

;--
;WRITE TO FLASH

XFRC29: MOV.W #BUFFER,R11
;RE-ESTABLISH BUFFER START

BIT.W #BUSY,&FCTL3

BUSY?
JNZ XFRC29
; YES


;NO
MOV.W #(0A500H+BLKWRT+WRT),&FCTL1
;ENABLE BLOCK WRITE
MOV.W #0A500H,&FCTL3
;CLEAR LOCK BIT

XFRC30: MOV.W @R11+,0(R6)
;WRITE WORD TO FLASH

XFRC31: BIT.W #WAIT,&FCTL3
;WAIT?
JZ XFRC31
; YES


;NO
INCDX.A R6
;NEXT
WORD ADDRESS
CMP.W R12,R11
;32 WORDS
TRANSFERRED? (END OF BLOCK)
JLO XFRC30

; NO


;YES
MOV.W #0A500H,&FCTL1
;CLR WRT AND BLKWRT
MOV.W #(0A500H+LOCK),&FCTL3
; SET LOCK BIT

XFRC32: BIT.W #BUSY,&FCTL3
;BUSY?
JNZ XFRC32
; YES

ADD.W #0064,R10
;ADD 64
BYTES TO EEPROM ADDRESS

TST.W R10
; THE
END OF BLOCK MEMORY?
JZ XFRC27

CMP.B &COMCNT,&CNTER1
; THE LAST CODE BLOCK?
JLO XFRC21
; NO

CMP.W &HRADR2,R10
;HAS 64 BYTE
VECTOR AREA BEEN REACHED?
JLO XFRC21

YES


;NO
JMP XFRCND

;----------------------

XFRC27: CMP.B &COMCNT,&CNTER1
JLO RAGAIN

;----------------------

XFRCND: BRA #EXSTRT
;START OF NEW
EXECUTABLE CODE
NOP
NOP
NOP

;------------ END OF THE XFRCOD ROUTINE
--------------------------------------------------------
In the previous email, this routine is loaded into RAMEXE area (in RAM) then
the program counter is branched to this routine for execution. This routine
first erase the FLASH of bank B, bank C, band B then back to bank A and
start to read EEPROM from Page 100H then write to FLASH start absolute
address at 05C00h. The program is long, sorry for not to make it aligment
nicely, but the main code is read from EEPROM (using P3.2 as a clock and P3
1 as DATA line) then write to FLASH. It is simple like that.

At the end of the code, you see the line of code BRA #EXSTRT means branch
to execution code start, and the program will restart with the brand new
code. Ofcourse this is the second part of the BSL program. The first part is
how to communicate with the PC to get the new program in the A43 file format
That is a different story.

Good luck!

Anthony Ha






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;*********************** PROGRAM TRANSFER CODE ******************************

;THE XFRCODE MUST BE MOVED FROM FLASH TO RAM AND THEN EXECUTED FROM RAM.  THIS
;CODE IS PART OF THE OBJECT CODE THAT WILL BE ERASED WHEN THE FLASH MEMORY IS
;ERASED.

XFRCOD:         DINT                                                                ;DISABLE INTERRUPTS
                           CLR.B           &CNTER1                                ;COUNTER FOR BLOCK MEMORY ACCESS

 

;----------- CLEAR BANK B OF FLASH MEMORY ------------------------------        
                           MOVX.A          #10000H,R15
        
                           MOV.W             #0A500H,&FCTL3                              ;CLEAR LOCK BIT
                           MOV.W             #(0A500H+MERAS),&FCTL1           ;SETUP FOR MASS ERASE
                           MOVX.A           #0,0(R15)                                              ;DUMMY WRITE TO START ERASE

 

L1:                     BIT.W                #BUSY,&FCTL3                                    ; Check if Flash being used
                           JNZ                    L1                     
       
;----------- CLEAR BANK C OF FLASH MEMORY ------------------------------       
                            MOVX.A          #20000H,R15
       
                           MOV.W             #0A500H,&FCTL3                                  ;CLEAR LOCK BIT
                            MOV.W             #(0A500H+MERAS),&FCTL1               ;SETUP FOR MASS ERASE
                             MOVX.A          #0,0(R15)                                                  ;DUMMY WRITE TO START ERASE

 

L2:                       BIT.W               #BUSY,&FCTL3                                        ; Check if Flash being used
                            JNZ                    L2                     

 


;----------- CLEAR BANK D OF FLASH MEMORY ------------------------------       
                            MOVX.A          #30000H,R15
       
                            MOV.W             #0A500H,&FCTL3                                  ;CLEAR LOCK BIT
                            MOV.W             #(0A500H+MERAS),&FCTL1               ;SETUP FOR MASS ERASE
                            MOVX.A            #0,0(R15)                                                ;DUMMY WRITE TO START ERASE

 

L3:                      BIT.W                  #BUSY,&FCTL3                                    ; Check if Flash being used
                            JNZ                     L3                      ;
;

 

                             MOV.W             #0A585H,&FCTL1                                  ;SMCLK/5+1 = 371KHZ (2.23 MHZ/6 = 371 KHZ)
                             MOV.W             #0A500H,&FCTL3                                  ;CLEAR LOCK BIT

 

                             MOV.W             #(0A500H+MERAS),&FCTL1                ;SETUP FOR MASS ERASE
                             CLR.W              &EXSTRT                                                  ;DUMMY WRITE TO START ERASE

 

XFRC00:             BIT.W                 #BUSY,&FCTL3                                        ;BUSY?
                             JNZ                     XFRC00   ; YES
                                                                                                                             ;NO

 

                                MOV.W             #0A500H,&FCTL1                                  ; PRECAUTION..CLR MASS ERASE BIT
                                 MOV.W             #(0A500H+LOCK),&FCTL3                 ;SET LOCK BIT

 

     ;SETUP T0 RD 64 EEP BYTE GROUPS TO BUF
     ; AND THEN TO WRT 32 WORD BLOCKS TO
     ; FLASH MEMORY


                             MOV.W                 #5C00H,R6                                              ;FLASH MEMORY START ADDRESS
                             MOV.W                 #1000H,R10                                             ;EEPROM CODE START ADDRESS

 

 XFRC01:             MOV.W                 #BUFFER,R11                                        ;BUFFER START ADDRESS
                              MOV.W                 #(BUFFER+64),R12                                ;BUFFER STOP ADDRESS FOR 64 BYTES
;--------------- READ 64 BYTES FROM EEPROM ---------------------------------
XFRC02:             BIC.B             #BIT1,&P3OUT                                                 ;OUT LATCH LOW FOR ACK REPLY TO DATA
                             MOV.B            #008H,R14                                                     ;BIT CTR
                             CLR                 R15                                                                  ;CLR RCVE DATA ACCUM REG

 

XFRC03:             BIC.B             #BIT2,&P3OUT                                           

Beginning Microcontrollers with the MSP430