USART on the PIC18F4550: Weird Divisor Problem

Started by sethmeisterG June 10, 2008

I've also been having weird problems with the divisor. I'm using a
PIC18F4550 with a 20 MHz crystal. I've been trying to get ANY serial
communications working (I'm using the PICDEM FS USB board). I finally
broke down and wrote a program that tried every possible value for
SPBRG (and the program outputs text and an ascii table at each
discrete SPBRG value), and I set my terminal program to 9600 (8N1).
The weird thing is that the SPBRG values that worked were from 0x4A to
0x51 (!!). According to the calculation in the datasheet, it should
be ~31 (20000000/9600/64 - 1) -- that certainly explains all the
framing errors I was seeing when I had it set at 31. Now for the life
of my I cannot understand how these values could possibly work. I
verified that SYNC = 0 (Asynch mode), BRGH = 0, and BRG16 = 0. The
config bits are set to HSPLL (so the CPU's running at 48 MHz on a 20
MHz clock (PLL divisor is 5 obviously, and CPU divisor is 2). If I
work backwards and try to calculation Fosc from the SPBRG values of
0x4A-0x51, I get between 46-48MHz -- Fosc cannot be that, right?

What am I missing??