AD Conversion

Started by Paul October 6, 2008
Hello,

Recently starting using PICs again!

Quick question with an easy answer i am hoping.
What i am doing is using a PIC16F877 and i am using a A-D conversion.
Its all working fine, but i am not getting a very repeatable result.
Is this normal for the PIC or am i missing something?

Setup as follows:
PIC16F877 running with 16Mhz clock
10k POT with +5,0V supply direct to AN0
AD Clock set at Fosc/32
For testing i am getting the AD value, putting it on a screen,
waiting 500ms ish, and starting again. The value is going +/- 4.
I am using the conversion value Left Justified so only using the top
8 bits of the value, and the set Vref+/Vref- to Vdd/Vss. There
doesn't seem to be anymore settings i can see

Has anyone used the AD on this PIC before and had similar issues?
I was thinking of writing some code to take an average, but thats
seems wrong... Also, i have a few 18F4331 PICs i might test also,
these seem more complex so may be better, I don't know

Any ideas would be great,
Thanks,
Paul
Paul,
what you see is quite normal, especially if this is a breadboard circuit or similar.

"...sion value Left Justified so only using the top 8 bits of the value...."
LJ or RJ...hat matters is how you use the data...
LJ and only reading ADRESH means you basically have a 8bit ADC.
But even in this case you'll most likely see some noise, 4 seems about normal.
Using all 10bit will give you correspondingly more noise.

What you can do:
-try and isolate the pot from the noisy VDD, eg. using a RC filter.
-definitely place a cap (100n or more) between ADpin and GND,
this will tend to remove noise, and act as a reservoir for the internal
sample&hold circuitry.
-do some sort of software filtering.

I think getting rid of all noise so you're left with only the +/-1 jitter is very difficult
or almost impossible unless you use a carefully designed multilayer PCB.

Paul wrote:

> Hello,
>
> Recently starting using PICs again!
>
> Quick question with an easy answer i am hoping.
> What i am doing is using a PIC16F877 and i am using a A-D conversion.
> Its all working fine, but i am not getting a very repeatable result.
> Is this normal for the PIC or am i missing something?
>
> Setup as follows:
> PIC16F877 running with 16Mhz clock
> 10k POT with +5,0V supply direct to AN0
> AD Clock set at Fosc/32
> For testing i am getting the AD value, putting it on a screen,
> waiting 500ms ish, and starting again. The value is going +/- 4.
> I am using the conversion value Left Justified so only using the top
> 8 bits of the value, and the set Vref+/Vref- to Vdd/Vss. There
> doesn't seem to be anymore settings i can see
>
> Has anyone used the AD on this PIC before and had similar issues?
> I was thinking of writing some code to take an average, but thats
> seems wrong... Also, i have a few 18F4331 PICs i might test also,
> these seem more complex so may be better, I don't know
>
> Any ideas would be great,
> Thanks,
> Paul
>
--
*******************************************
VISIT MY HOME PAGE:

LAST UPDATED: 23/08/2003
*******************************************
Regards
Eirik Karlsen
> Paul,
> what you see is quite normal, especially if this is a breadboard circuit
> or similar.
>
> "...sion value Left Justified so only using the top 8 bits of the
> value...."
> LJ or RJ...hat matters is how you use the data...
> LJ and only reading ADRESH means you basically have a 8bit ADC.
> But even in this case you'll most likely see some noise, 4 seems about
> normal.
> Using all 10bit will give you correspondingly more noise.
>
> What you can do:
> -try and isolate the pot from the noisy VDD, eg. using a RC filter.

Most pots are "noisy" all by themselves, so expect jitter when using all
but the very highest quality.

> -definitely place a cap (100n or more) between ADpin and GND,
> this will tend to remove noise, and act as a reservoir for the internal
> sample&hold circuitry.

I don't often recommend this, it could bias the readings. Unless you
have a rapidly changing analog input and could use some hardware
filtering, I've found that it usually didn't help me to do this.

> -do some sort of software filtering.

This is always useful, and usually needed. You'll do it eventually. ;)

More stuff:

Isolate your AVdd from your Vdd. Lots of filtering and/or a separate
regulator can help a lot here.

Isolate your AVss from your Vss. This isn't so obvious to most. You
can have "ground bounce" from digital logic on your ground so keeping
your analog signals on a restricted return path that is tied back to the
main logic ground from a single location will do a lot to remove noise
from this ground.

Then there are the obvious things: Keep analog lines physically away from
digital logic lines or any "high energy" traces. Keep your analog traces
short and directed. The usual.

DLC

>
> I think getting rid of all noise so you're left with only the +/-1 jitter
> is very difficult
> or almost impossible unless you use a carefully designed multilayer PCB.
>
> Paul wrote:
>
>> Hello,
>>
>> Recently starting using PICs again!
>>
>> Quick question with an easy answer i am hoping.
>> What i am doing is using a PIC16F877 and i am using a A-D conversion.
>> Its all working fine, but i am not getting a very repeatable result.
>> Is this normal for the PIC or am i missing something?
>>
>> Setup as follows:
>> PIC16F877 running with 16Mhz clock
>> 10k POT with +5,0V supply direct to AN0
>> AD Clock set at Fosc/32
>> For testing i am getting the AD value, putting it on a screen,
>> waiting 500ms ish, and starting again. The value is going +/- 4.
>> I am using the conversion value Left Justified so only using the top
>> 8 bits of the value, and the set Vref+/Vref- to Vdd/Vss. There
>> doesn't seem to be anymore settings i can see
>>
>> Has anyone used the AD on this PIC before and had similar issues?
>> I was thinking of writing some code to take an average, but thats
>> seems wrong... Also, i have a few 18F4331 PICs i might test also,
>> these seem more complex so may be better, I don't know
>>
>> Any ideas would be great,
>> Thanks,
>> Paul
>>
> --
> *******************************************
> VISIT MY HOME PAGE:
>
> LAST UPDATED: 23/08/2003
> *******************************************
> Regards
> Eirik Karlsen
--
Dennis Clark
TTT Enterprises
Hi

Thanks for the thoughts, I will have an experiment!

Paul
From: Eirik Karlsen
Sent: Monday, October 06, 2008 9:08 PM
To: p...
Subject: Re: [piclist] AD Conversion
Paul,
what you see is quite normal, especially if this is a breadboard circuit or similar.

"...sion value Left Justified so only using the top 8 bits of the value...."
LJ or RJ...hat matters is how you use the data...
LJ and only reading ADRESH means you basically have a 8bit ADC.
But even in this case you'll most likely see some noise, 4 seems about normal.
Using all 10bit will give you correspondingly more noise.

What you can do:
-try and isolate the pot from the noisy VDD, eg. using a RC filter.
-definitely place a cap (100n or more) between ADpin and GND,
this will tend to remove noise, and act as a reservoir for the internal
sample&hold circuitry.
-do some sort of software filtering.

I think getting rid of all noise so you're left with only the +/-1 jitter is very difficult
or almost impossible unless you use a carefully designed multilayer PCB.

Paul wrote:

Hello,
Recently starting using PICs again!

Quick question with an easy answer i am hoping.
What i am doing is using a PIC16F877 and i am using a A-D conversion.
Its all working fine, but i am not getting a very repeatable result.
Is this normal for the PIC or am i missing something?

Setup as follows:
PIC16F877 running with 16Mhz clock
10k POT with +5,0V supply direct to AN0
AD Clock set at Fosc/32
For testing i am getting the AD value, putting it on a screen,
waiting 500ms ish, and starting again. The value is going +/- 4.
I am using the conversion value Left Justified so only using the top
8 bits of the value, and the set Vref+/Vref- to Vdd/Vss. There
doesn't seem to be anymore settings i can see

Has anyone used the AD on this PIC before and had similar issues?
I was thinking of writing some code to take an average, but thats
seems wrong... Also, i have a few 18F4331 PICs i might test also,
these seem more complex so may be better, I don't know

Any ideas would be great,
Thanks,
Paul

--
*******************************************
VISIT MY HOME PAGE:

LAST UPDATED: 23/08/2003
*******************************************
Regards
Eirik Karlsen
Thanks for the reply, I have been working on some hardware filtering!

Paul
From: Dennis Clark
Sent: Monday, October 06, 2008 9:41 PM
To: p...
Subject: Re: [piclist] AD Conversion

> Paul,
> what you see is quite normal, especially if this is a breadboard circuit
> or similar.
>
> "...sion value Left Justified so only using the top 8 bits of the
> value...."
> LJ or RJ...hat matters is how you use the data...
> LJ and only reading ADRESH means you basically have a 8bit ADC.
> But even in this case you'll most likely see some noise, 4 seems about
> normal.
> Using all 10bit will give you correspondingly more noise.
>
> What you can do:
> -try and isolate the pot from the noisy VDD, eg. using a RC filter.

Most pots are "noisy" all by themselves, so expect jitter when using all
but the very highest quality.

> -definitely place a cap (100n or more) between ADpin and GND,
> this will tend to remove noise, and act as a reservoir for the internal
> sample&hold circuitry.

I don't often recommend this, it could bias the readings. Unless you
have a rapidly changing analog input and could use some hardware
filtering, I've found that it usually didn't help me to do this.

> -do some sort of software filtering.

This is always useful, and usually needed. You'll do it eventually. ;)

More stuff:

Isolate your AVdd from your Vdd. Lots of filtering and/or a separate
regulator can help a lot here.

Isolate your AVss from your Vss. This isn't so obvious to most. You
can have "ground bounce" from digital logic on your ground so keeping
your analog signals on a restricted return path that is tied back to the
main logic ground from a single location will do a lot to remove noise
from this ground.

Then there are the obvious things: Keep analog lines physically away from
digital logic lines or any "high energy" traces. Keep your analog traces
short and directed. The usual.

DLC

>
> I think getting rid of all noise so you're left with only the +/-1 jitter
> is very difficult
> or almost impossible unless you use a carefully designed multilayer PCB.
>
> Paul wrote:
>
>> Hello,
>>
>> Recently starting using PICs again!
>>
>> Quick question with an easy answer i am hoping.
>> What i am doing is using a PIC16F877 and i am using a A-D conversion.
>> Its all working fine, but i am not getting a very repeatable result.
>> Is this normal for the PIC or am i missing something?
>>
>> Setup as follows:
>> PIC16F877 running with 16Mhz clock
>> 10k POT with +5,0V supply direct to AN0
>> AD Clock set at Fosc/32
>> For testing i am getting the AD value, putting it on a screen,
>> waiting 500ms ish, and starting again. The value is going +/- 4.
>> I am using the conversion value Left Justified so only using the top
>> 8 bits of the value, and the set Vref+/Vref- to Vdd/Vss. There
>> doesn't seem to be anymore settings i can see
>>
>> Has anyone used the AD on this PIC before and had similar issues?
>> I was thinking of writing some code to take an average, but thats
>> seems wrong... Also, i have a few 18F4331 PICs i might test also,
>> these seem more complex so may be better, I don't know
>>
>> Any ideas would be great,
>> Thanks,
>> Paul
>>
> --
> *******************************************
> VISIT MY HOME PAGE:
>
> LAST UPDATED: 23/08/2003
> *******************************************
> Regards
> Eirik Karlsen

--
Dennis Clark
TTT Enterprises
Hi Paul.

Are you waiting for the conversion to be completed before you fetch the result?
I work with the 18F pics myself and experienced a similar problem at
one stage. Basically, while the conversion is happening, the value in
the result register will vary. To avoid this, I poll the GO bit or
the appropriate interrupt bit to see when the conversion is completed
and then fetch the result.

If you are waiting for the conversion to complete, you may find the
problem lies with noise on the Analogue input pin.

Hope this helps.

William
2008/10/6 Paul :
> Hello,
>
> Recently starting using PICs again!
>
> Quick question with an easy answer i am hoping.
> What i am doing is using a PIC16F877 and i am using a A-D conversion.
> Its all working fine, but i am not getting a very repeatable result.
> Is this normal for the PIC or am i missing something?
>
> Setup as follows:
> PIC16F877 running with 16Mhz clock
> 10k POT with +5,0V supply direct to AN0
> AD Clock set at Fosc/32
> For testing i am getting the AD value, putting it on a screen,
> waiting 500ms ish, and starting again. The value is going +/- 4.
> I am using the conversion value Left Justified so only using the top
> 8 bits of the value, and the set Vref+/Vref- to Vdd/Vss. There
> doesn't seem to be anymore settings i can see
>
> Has anyone used the AD on this PIC before and had similar issues?
> I was thinking of writing some code to take an average, but thats
> seems wrong... Also, i have a few 18F4331 PICs i might test also,
> these seem more complex so may be better, I don't know
>
> Any ideas would be great,
> Thanks,
> Paul

Paul,

The various comments already made are quite valid, but I wanted to add a
couple of notes for you to consider.

I refer you to the following Microchip documents which directly address
these kinds of matters.

"Techniques that Reduce System Noise in ADC Circuits"
http://ww1.microchip.com/downloads/en/DeviceDoc/adn007.pdf

"Designing . Delta-Sigma ADC"
http://ww1.microchip.com/downloads/en/AppNotes/01007a.pdf

"Analog and Interface Guide - Volume 2"
http://ww1.microchip.com/downloads/en/DeviceDoc/21975b.pdf

(See the ADC Section)

There was a book that came out, C 2007, "Intelligent Sensor Design - Using
the Microchip dsPIC", by Creed Huddleston. Published by Newnes.

Don't be put off by the "dsPIC" aspect of the title. The portions relating
to sensor reading or sampling (e.g. reading an ADC) makes points that
filtering in the digital domain (low-pass filtering and averaging etc) can
often greatly reduce the need to do too much in hardware. This can lead to a
smaller and cheaper solution. Hardware needs to be built for every device
shipped. Software only needs to be written once, and then its "free" per
unit.

General Summary:

Use a Ground Plane if possible. Separate analog and digital signals and
power. Bypass power and ADrefs. Low-pass filter the signal. Average the
numeric results. Accept that you may well never get as many bits as your ADC
offers, due to noise.

For an ADC, ensure the source impedance is low enough to feed the ADC
inputs. Not an issue with your 10k pot, but often a problem with other kinds
of things. That's why you may see an op-amp between a sensor and an ADC.
Also allows you to address gain and voltage offset issues. Also an easy
place to tie in a hardware low-pass filter.

All above offered in good faith. Its not complete by far, but just a few
options to help you consider what you see.

Regards,

Jim Towler

Wellington

New Zealand

From: p... [mailto:p...] On Behalf Of
Paul
Sent: Tuesday, 7 October 2008 5:48 a.m.
To: p...
Subject: [piclist] AD Conversion

Hello,

Recently starting using PICs again!

Quick question with an easy answer i am hoping.
What i am doing is using a PIC16F877 and i am using a A-D conversion.
Its all working fine, but i am not getting a very repeatable result.
Is this normal for the PIC or am i missing something?

Setup as follows:
PIC16F877 running with 16Mhz clock
10k POT with +5,0V supply direct to AN0
AD Clock set at Fosc/32
For testing i am getting the AD value, putting it on a screen,
waiting 500ms ish, and starting again. The value is going +/- 4.
I am using the conversion value Left Justified so only using the top
8 bits of the value, and the set Vref+/Vref- to Vdd/Vss. There
doesn't seem to be anymore settings i can see

Has anyone used the AD on this PIC before and had similar issues?
I was thinking of writing some code to take an average, but thats
seems wrong... Also, i have a few 18F4331 PICs i might test also,
these seem more complex so may be better, I don't know

Any ideas would be great,
Thanks,
Paul
i use the 18f with a/d
i put a small cap on an port to stop noise pots are bad
i only use multi turn
remember internal and external caps take time to set
mike

--- In p..., "William Gebers" wrote:
>
> Hi Paul.
>
> Are you waiting for the conversion to be completed before you fetch
the result?
> I work with the 18F pics myself and experienced a similar problem at
> one stage. Basically, while the conversion is happening, the value
in
> the result register will vary. To avoid this, I poll the GO bit or
> the appropriate interrupt bit to see when the conversion is
completed
> and then fetch the result.
>
> If you are waiting for the conversion to complete, you may find the
> problem lies with noise on the Analogue input pin.
>
> Hope this helps.
>
> William
> 2008/10/6 Paul :
> > Hello,
> >
> > Recently starting using PICs again!
> >
> > Quick question with an easy answer i am hoping.
> > What i am doing is using a PIC16F877 and i am using a A-D
conversion.
> > Its all working fine, but i am not getting a very repeatable
result.
> > Is this normal for the PIC or am i missing something?
> >
> > Setup as follows:
> > PIC16F877 running with 16Mhz clock
> > 10k POT with +5,0V supply direct to AN0
> > AD Clock set at Fosc/32
> > For testing i am getting the AD value, putting it on a screen,
> > waiting 500ms ish, and starting again. The value is going +/- 4.
> > I am using the conversion value Left Justified so only using the
top
> > 8 bits of the value, and the set Vref+/Vref- to Vdd/Vss. There
> > doesn't seem to be anymore settings i can see
> >
> > Has anyone used the AD on this PIC before and had similar issues?
> > I was thinking of writing some code to take an average, but thats
> > seems wrong... Also, i have a few 18F4331 PICs i might test also,
> > these seem more complex so may be better, I don't know
> >
> > Any ideas would be great,
> > Thanks,
> > Paul
> >
>
Pots are very noisy, but I think the noise is almost purely random, so you
can limit the noise magnitude significantly by sacrificing signal
bandwidth. for high accuracy stuff I put a unity gain op amp buffer
in front of the pot and then an active low pass first order filter in
front of that. The first unity gain stage is used to buffer the
filter from the changing resistance of the pot that would then cause
gain changes and destroy the usable signal. The filter cuts out the
high frequency noise and provides a very low impedance signal so I
don't have to worry about the ADC acquisition time being too long or
causing aliasing problems.

Digital filtering can't do much against noise that comes in above the
nyquist frequency of your ADC so you should always filter it somehow.
A fairly decent dual op-amp IC is somewhere around $0.35 @ Qty:1 now
days, and a Quad precision op amp is around $1.00, so it usually
doesn't impact my build costs too much... even then at the very least
I'll throw a cap across the POT to form an unsightly, but still
effective, low pass passive filter.

A proper filter design will not affect DC signal levels significantly
(a precision op amp has 0.15mV offset = less than 1/2LSB with a 3.22mV
LSB @ 10bit resolution and 3.3v vref), even then you simply use high
precision op amps and calibration to trim out any DC offsets.
Aaron
--- In p..., "d70mike" wrote:
>
> i use the 18f with a/d
> i put a small cap on an port to stop noise pots are bad
> i only use multi turn
> remember internal and external caps take time to set
> mike
>
> --- In p..., "William Gebers" wrote:
> >
> > Hi Paul.
> >
> > Are you waiting for the conversion to be completed before you fetch
> the result?
> > I work with the 18F pics myself and experienced a similar problem at
> > one stage. Basically, while the conversion is happening, the value
> in
> > the result register will vary. To avoid this, I poll the GO bit or
> > the appropriate interrupt bit to see when the conversion is
> completed
> > and then fetch the result.
> >
> > If you are waiting for the conversion to complete, you may find the
> > problem lies with noise on the Analogue input pin.
> >
> > Hope this helps.
> >
> > William
> >
> >
> > 2008/10/6 Paul :
> > > Hello,
> > >
> > > Recently starting using PICs again!
> > >
> > > Quick question with an easy answer i am hoping.
> > > What i am doing is using a PIC16F877 and i am using a A-D
> conversion.
> > > Its all working fine, but i am not getting a very repeatable
> result.
> > > Is this normal for the PIC or am i missing something?
> > >
> > > Setup as follows:
> > > PIC16F877 running with 16Mhz clock
> > > 10k POT with +5,0V supply direct to AN0
> > > AD Clock set at Fosc/32
> > > For testing i am getting the AD value, putting it on a screen,
> > > waiting 500ms ish, and starting again. The value is going +/- 4.
> > > I am using the conversion value Left Justified so only using the
> top
> > > 8 bits of the value, and the set Vref+/Vref- to Vdd/Vss. There
> > > doesn't seem to be anymore settings i can see
> > >
> > > Has anyone used the AD on this PIC before and had similar issues?
> > > I was thinking of writing some code to take an average, but thats
> > > seems wrong... Also, i have a few 18F4331 PICs i might test also,
> > > these seem more complex so may be better, I don't know
> > >
> > > Any ideas would be great,
> > > Thanks,
> > > Paul
> > >
> > >
>