Forums

more PC, PCL, and PCLATH confusion

Started by jrem123 February 3, 2004
Okay, so I can write into the PCL, and I can write into the PCLATH,
and dependent upon the execution either an 11 bit or a 13 bit value
goes into the PC (which is PCH and PCL).

11 bits is 7FF, 13 bits is 1FFF (I'm working with a 16F628). So it
appears the 1FFF is the 2k flash program size, so there are 4 banks
of 7FF each bank, so an 11 bit wide PC stays in the same bank, a 13
bit PC jumps banks?

Now, assuming I am somewhat close on the above, why are the banks
7F, FF, 17F, and 1FF? I would think they would be 7FF, FFF, 17FF,
and 1FFF?

What am I missing?



You are not missing anything, just confusing memory pages with file
register banks. The same scheme applies to them, but using the
intruction file information or the FSR, along with the Bank Select
bits.

Chad

--- jrem123 <> wrote:
> Okay, so I can write into the PCL, and I can write into the PCLATH,
> and dependent upon the execution either an 11 bit or a 13 bit value
> goes into the PC (which is PCH and PCL).
>
> 11 bits is 7FF, 13 bits is 1FFF (I'm working with a 16F628). So it
> appears the 1FFF is the 2k flash program size, so there are 4 banks
> of 7FF each bank, so an 11 bit wide PC stays in the same bank, a 13
> bit PC jumps banks?
>
> Now, assuming I am somewhat close on the above, why are the banks
> 7F, FF, 17F, and 1FF? I would think they would be 7FF, FFF, 17FF,
> and 1FFF?
>
> What am I missing?


=====
My software has no bugs. Only undocumented features.

__________________________________




----- Original Message -----
From: jrem123 <>
To: <>
Sent: Tuesday, February 03, 2004 4:31 PM
Subject: [piclist] more PC, PCL, and PCLATH confusion > Okay, so I can write into the PCL, and I can write into the PCLATH,
> and dependent upon the execution either an 11 bit or a 13 bit value
> goes into the PC (which is PCH and PCL).

Don't think of it as "either / or" just think of it as always the same but
with some of the bits not having any effect.

>
> 11 bits is 7FF, 13 bits is 1FFF (I'm working with a 16F628). So it
> appears the 1FFF is the 2k flash program size,

$800 is 2K, $7FF is 2K-1

> so there are 4 banks
> of 7FF each bank, so an 11 bit wide PC stays in the same bank, a 13
> bit PC jumps banks?

Its always 13 bits but with a 628 all 4 banks map to bank 0

>
> Now, assuming I am somewhat close on the above, why are the banks
> 7F, FF, 17F, and 1FF? I would think they would be 7FF, FFF, 17FF,
> and 1FFF?

You are confusing RAM banks and code banks.

>
> What am I missing?

Yes. The PIC has two seperate memories for variable and program storage. The
variable memory (RAM and special function registers) start at address 0 and
end at address $1FF. The program memory starts at a DIFFERENT address 0 and
ends at address $1FFF.

The instructions in a program that access the variable memory can only be
used to access the variable memory. The instructions that access program
memory can only access program memory. RP0 and RP1 in the STATUS register
select the current variable memory bank, Bits 11 and 12 of the PC select the
current program memory bank. Bits 11 and 12 of the PC are loaded from PCLATH
whenever you execute a GOTO or call instruction or when you write to PCL.

Within a variable memory accessing instruction (e..g. ADDWF) you have the
address field which is made up of 7 bits, this holds a number between 0 and
$7F. RP0 forms the eighth bit if this address and RP1 forms the nineth bit
of this address. When the variable memory is accessed all 9 bits of this
address are used.

Within a program memory accessing instruction (e.g. GOTO or CALL) you have
the address field which is made up of 11 bits. This holds a number between 0
and $7FF. Bit 11 of PCLATH forms bit 11 of this address and bit 12 of
PCLATH forms bit 12 of this address. So the 11 bits in the instruction now
look like 13 bits. When the instruction is executed all 13 bits are loaded
into the PC.

FSR can only be used to reference the variable memory. It is 8 bits wide so
can only address $00 to $FF. To read $100 to $1FF you need to use IRP in the
STATUS register. Clear IRP to 0 and FSR refers to address $00 to $FF in the
variable menory, set IRP to 1 and FSR refers to address $100 to $1FF in the
variable menory. IRP behaves like a nineth bit for FSR.

FYI the xcasm assembler does automatic RAM and code bank management for you.
It inserts RAM and code bank select instructions into the executable. The
xcsim simulator traps variable accesses in the wrong RAM bank and code
accesses to the wrong code bank.

Regards
Sergio Masci

http://www.xcprod.com/titan/XCSB - optimising structured PIC BASIC compiler