Hello,

           I have worked a lot on PCB design and want to move to the next level i.e IC design. As far as I understand, there are three possibilities, 

1. FPGA

2. System on Chip like psoc from cypress

3. Unique IC design using an ASIC chip layout tool like Cadence.

My question is the can Cadence be used to make a chip like the ESP8266? Also can it be used for extremely complex chips like the Qualcomm Snapdragon S4?

Thanks.

Hello Gurus,

              The silence tells me >>ONE< thing

I am on to the >>NEXT<< level in electronics...

If I had posted a OOOoooo poor little me and my microcontroller and like my I2C is not talking etc there would have be a good 10+ responses by now ....

But this is the real deal... how are fantastic chips like the ESP8266, SnapDragon made??

So never mind, I'll keep at it ....

Why don't you have a chat with Espressif?

The chip designers tend to not talk so much about the tools they use, but there's not too much choice: Mentor, Cadence, Synopsys tools, depends on whether it's fully digital or analog, mixed, down to technology level or functional simulation only.

In the end you'll have a patchwork and you can be sure it's too complex to stem alone, plus you'd have to buy many IP blocks from various vendors and be lucky if you can put this into an again very expensive co-simulation toolchain and come out with working silicon (again pricy).

For the record: I don't consider the ESP8266 a fantastic chip. The software concept (firmware/CPU) is a total mess, but ok, the RF part is at least working - still wondering how some of those modules got their FCC number. A way better job is done on Mediatek chipsets.

I'd say: Give it a go on an FPGA. If you got your first programmable state machine (no need to be a turingy CPU yet), you'll have an idea how complex it can get, when you'd have to deal with like factor 10 of the complexity of FPGA-technologies and mixed signals.