Software Development for Parallel and Multi-Core Processing
The embedded software industry wants microprocessors with increased computing functionality that maintains or reduces space, weight, and power (SWaP). Single core processors were the key embedded industry solution between 1980 and 2000 when large performance increases were being achieved on a yearly basis and were fulfilling the prophecy of Moore's Law. Moore's Law states that "the number of transistors that can be placed inexpensively on an integrated circuit doubles approximately every two years." With the increased transistors, came microprocessors with greater computing throughput while space, weight and power were decreasing. However, this 'free lunch' did not last forever. The additional power required for greater performance improvements became too great starting in 2000. Hence, single core microprocessors are no longer an optimal solution.
Summary
Kenn R. Luecke's 2012 paper analyzes the challenges and design patterns for building embedded software on parallel and multi-core processors, with emphasis on maintaining SWaP while increasing compute. It explains trade-offs in multiprocessing models, RTOS and OS considerations, and practical approaches to inter-core communication and scheduling.
Key Takeaways
- Differentiate SMP and AMP approaches and choose the right multiprocessing model for embedded real-time requirements.
- Apply multicore-aware RTOS and firmware design patterns for task partitioning, scheduling, and determinism.
- Design robust inter-core communication and synchronization using message passing, shared memory, and lightweight IPC mechanisms.
- Optimize power and performance (SWaP) through workload partitioning, frequency/power state management, and cache-aware placement.
Who Should Read This
Embedded firmware engineers, system architects, and RTOS developers with experience porting or designing software for multicore embedded platforms who need practical strategies for scheduling, IPC, and SWaP trade-offs.
Still RelevantAdvanced
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