Clock cycles

Started by arshadnatasha in comp.arch.embedded22 hours ago 3 replies

Hi all: I have been stuck on this problem for a while - can someone help me figure this out? For the following instruction, the instruction set...

Hi all: I have been stuck on this problem for a while - can someone help me figure this out? For the following instruction, the instruction set manual says it should take 5 clock cycles, whereas according to my measurements using an oscilloscope, I should get 4 clock cycles. What could be the reason for the difference? I am using TelosB. add #1, -4(r4) -------------------------------...


Short blocking delay in Cortex-M0+

Started by pozz in comp.arch.embedded1 day ago 11 replies

During startup, I need a short and not precise delay, before configuring clocks, timers and other peripherals (at startup the CPU runs with...

During startup, I need a short and not precise delay, before configuring clocks, timers and other peripherals (at startup the CPU runs with internal clock). What do you suggest? I think there's a simpler method than configuring a hardware timer. I need to check the status of an input pin, *after* enabling internal pull-up. I'd like to introduce a short delay after enabling internal ...


Mnemonic suggestion please

Started by Dimiter_Popoff in comp.arch.embedded2 days ago 4 replies

After over 15 years of vpa use I want to put a new mnemonic for bit set, bit clear, bit change, and for bit test. The old ones are CPU32...

After over 15 years of vpa use I want to put a new mnemonic for bit set, bit clear, bit change, and for bit test. The old ones are CPU32 legacy - with extended source/destination addressing capabilities. So they are (let's do just bit set): bset[.size] ,[source1], (or sort of). For example: bset.l #0,(address) will read the longword (32 bits) at address, test i


Greatest Hits from Tech Support!

Started by Dave Nadler in comp.arch.embedded6 days ago 7 replies

You guys might appreciate this, received almost 2 months after posting a...

You guys might appreciate this, received almost 2 months after posting a bug: https://community.nxp.com/message/878673?commentID=878673 Yikes. Customer is suggesting we shouldn't use Freescale (NXP?) in future; Kinetis parts may go away in product rationalization... See ya, Dave


Codewright Failure

Started by rickman in comp.arch.embedded1 week ago 5 replies

Newsgroups are my last ditch resource for bugs with old software. I know Codewright is old and no longer supported. But I have it and I'm...

Newsgroups are my last ditch resource for bugs with old software. I know Codewright is old and no longer supported. But I have it and I'm not ready to switch. Meanwhile, something happend while I was running in safe mode and now Codewright is messed up when running in standard windows mode. I can open files, but I can't select anything in them or do any edits. I can't even position...


Is protected flash secure?

Started by Klaus Kragelund in comp.arch.embedded1 week ago 4 replies

Hi So, I have been using a ST Cortex M0 STM32, NXP LPC, PIC32 and also a Renesas RX63. Just for fun. They look interesting as a potential...

Hi So, I have been using a ST Cortex M0 STM32, NXP LPC, PIC32 and also a Renesas RX63. Just for fun. They look interesting as a potential candidate All processors has a bit to set it up in protected mode, so the flash with proprietary IP cannot be read out But, say my competitor wants to dig into my code Is there really such a thing as a safe micro controller which memory is protecte...


Do you use FSMs or HSMs?

Started by pozz in comp.arch.embedded1 week ago 37 replies

I often encounter many problems when I have to implement a "behaviour" in a microcontrollor. For example, I have some analog/digital inputs and...

I often encounter many problems when I have to implement a "behaviour" in a microcontrollor. For example, I have some analog/digital inputs and some user commands. Based on that, the logic should set some outputs (digital or analog). Most of the time you (the developer) must understand what is the good behaviour of the machine, because noone is able to describe it in a good way. I usu...


Suggestions on solutions to develop an embedded web server over Ethernet interface

Started by pozz in comp.arch.embedded2 weeks ago 10 replies

I will develop a device that must be monitored and controlled by remote through an IP connection over Ethernet interface. I'm not an expert of...

I will develop a device that must be monitored and controlled by remote through an IP connection over Ethernet interface. I'm not an expert of embedded TCP/IP and HTTP server, so I would prefer to separate the main MCU (Cortex-Mx that I already know) from the "remote MCU" (it is a block box at the moment). This separation could be useful if someone will decide to give the remote connecti...


soft real-time on linux

Started by Randy Yates in comp.arch.embedded2 weeks ago 11 replies

Hello All, I have a requirement to port the MSTP physical layer (basically RS-485) of the BACnet protocol stack to linux. The protocol...

Hello All, I have a requirement to port the MSTP physical layer (basically RS-485) of the BACnet protocol stack to linux. The protocol requires certain timing to be met, for example, the response to a "Poll For Master" must be less than 20 milliseconds. In order to develop this in as short an amount of time, I'd like to use simple threads and read()/write() commands. However, the standar...


Stupid design decisions

Started by Robert Wessel in comp.arch.embedded2 weeks ago 69 replies

The following is more a vent than anything really constructive, but... So for the last four days (yes, I got called in New Years...

The following is more a vent than anything really constructive, but... So for the last four days (yes, I got called in New Years day afternoon), something has been beeping in the computer room. Let me rephrase that. A proper beep would have likely been little more than an annoyance. No, this was a single, fraction of a second, fairly high frequency, not very loud, chirp, repeated at odd...


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