Embedded Ethernet

Started by pozz in comp.arch.embedded5 hours ago 37 replies

There are many MCUs with embedded Ethernet (MAC). It seems most of the open-source examples are lwip-based. I have to design a board with one...

There are many MCUs with embedded Ethernet (MAC). It seems most of the open-source examples are lwip-based. I have to design a board with one RS485 port and one Ethernet port. It could be seen as a serial-to-Ethernet converter, where the protocol on RS485 is proprietary. On Ethernet side I will contact a server (cloud) with a protocol that must be defined. At the moment, I don't need...


Uploads - What is wrong with Easynews

Started by Anonymous in comp.arch.embedded1 week ago

Looking for Star Trek Discovery season 1 Episodes 6 onwards in english. Why does it seem there are no posts any more ??? --- This email has...

Looking for Star Trek Discovery season 1 Episodes 6 onwards in english. Why does it seem there are no posts any more ??? --- This email has been checked for viruses by AVG. http://www.avg.com


CfP 23rd Conf. Reliable Software Technologies, Ada-Europe 2018

Started by Dirk Craeynest in comp.arch.embedded1 week ago

----------------------------------------------------------------------- Call for Papers 23rd...

----------------------------------------------------------------------- Call for Papers 23rd International Conference on Reliable Software Technologies - Ada-Europe 2018 18-22 June 2018, Lisbon, Portugal http://www.ada-europe.org/conference2018 Organized by U.Lisboa on behalf...


Position independent code with fixed data and bss

Started by Christopher Collins in comp.arch.embedded2 weeks ago 20 replies

MCU: STM32F4 (ARM Cortex M4) Build environment: arm-none-eabi-gcc 4.8.4 20140725 My goal is to build an image that can be run from any...

MCU: STM32F4 (ARM Cortex M4) Build environment: arm-none-eabi-gcc 4.8.4 20140725 My goal is to build an image that can be run from any properly-aligned offset in internal flash (i.e., position-independent). I found the following set of gcc flags that achieves this goal: # Generate position independent code. -fPIC # Access bss via the GOT. -mno-pic-data-is-text-relati...


Getting i2c touchscreen to work on TS4900

Started by Anonymous in comp.arch.embedded3 weeks ago

Hey everyone, I've been working on a project that's using a Technologic Systems TS4900 module as its core. For peripherals we've got two USB...

Hey everyone, I've been working on a project that's using a Technologic Systems TS4900 module as its core. For peripherals we've got two USB ports, ethernet, + sound and touchscreen. The board is running Debian jessie with The part I've been toiling away at is the touchscreen, which is a Newhaven NHD-7.0-800480EF-ASXV#-CTP. My first problem was finding a kernel driver and devi


How to get a headless Apache server to join a wireless network

Started by John Speth in comp.arch.embedded4 weeks ago 15 replies

Hi- My request takes me way outside my knowledge area so please pardon my poor vocabulary. I'm working on a headless wireless Apache...

Hi- My request takes me way outside my knowledge area so please pardon my poor vocabulary. I'm working on a headless wireless Apache server device (no mouse, keyboard, or display). I need a way to externally make it join a network. Externally means some software entity that does not initiate the connection process from within the device. That software entity could be a phone or ...


CPU Virtualization / CPU state

Started by Ilias Abrams in comp.arch.embedded4 weeks ago 10 replies

Hi, I was wondering if someone can explain to me what CPU virtualization means from the perspective of inside of a CPU. I mean, If I have a...

Hi, I was wondering if someone can explain to me what CPU virtualization means from the perspective of inside of a CPU. I mean, If I have a single core how I virtualized it? What parts and functions of a CPU I have to know (registers, MMU) for achieving this CPU virtualization function? Is there any "general" programming code that does this? Also, I wil try to explain it as much b


Firmware upgrade strategies

Started by pozz in comp.arch.embedded4 weeks ago 4 replies

The first thing to think of is the firmware upgrade strategy of an electronic device with embedded software. There are a multitude of...

The first thing to think of is the firmware upgrade strategy of an electronic device with embedded software. There are a multitude of bootloader out there for different microcontrollers, physical communication links and features. I know it's difficult, but is there a somewhat standard firmware upgrade procedure/strategy/protocol? Some open approach that is followed by different vend...


Beware of GNU-ARM compiler for Cortex-M0/M0+/M1

Started by StateMachineCOM in comp.arch.embedded4 weeks ago 18 replies

The popular GNU-ARM toolset has had long-known issues for the Cortex-M0/M0+/M1 (ARMv6-M architecture). Specifically, people have reported very...

The popular GNU-ARM toolset has had long-known issues for the Cortex-M0/M0+/M1 (ARMv6-M architecture). Specifically, people have reported very inefficient code generated, see "Cortex M0/M0+/M1/M23 BAD Optimisation in GCC" https://embdev.net/topic/426508 . But while so far people reported only inefficient code, I would like to make people aware of *incorrect* code generated by GNU-AR


Can a piezo buzzer generate damaging voltages?

Started by John Speth in comp.arch.embedded1 month ago 10 replies
MCU

My team is being asked to find out why a circuit is failing for no obvious reason. The circuit has a piezo buzzer (CEP2242 from CUI, Inc). ...

My team is being asked to find out why a circuit is failing for no obvious reason. The circuit has a piezo buzzer (CEP2242 from CUI, Inc). The buzzer is driven by a MCU driven FET that completes a circuit like this: high side power 3.3V -> buzzer -> FET -> ground (BSS123LT1 FET on the low side). Does anybody have any experience with the possibility of a piezo buzzer generating dama


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