IBM's PPC being open sourced .. what does this mean for embedded devices ?

Started by kristoff in comp.arch.embedded5 hours ago 6 replies

HI all, I know is this kind-of old news by now, but -as far as I see- this has not been discussed here: IBM is open-sourcing their...

HI all, I know is this kind-of old news by now, but -as far as I see- this has not been discussed here: IBM is open-sourcing their PowerPC processor design. (E.g. see here and other links:) https://www.eejournal.com/article/ibm-gives-away-powerpc-goes-open-source/) As PowerPC processors do are used in embedded devices, anybody any idea what this would mean for the embedded-pro...


intel 386 et al

Started by Hul Tytus in comp.arch.embedded8 hours ago 11 replies

Anyone know of a good handbook describing the machine code of Intel's 386's? A page describing each instruction along with some text about the...

Anyone know of a good handbook describing the machine code of Intel's 386's? A page describing each instruction along with some text about the various sequences caused by interupts and descriptions of the various tables and "descriptors" and special purpose registers and the effects of "protected mode" is the hope. An older text that didn't describe the 64 bit versions would be ok, mayb...


RISC-V Picking Up Steam

Started by Rick C in comp.arch.embedded1 day ago 11 replies

RISC-V is appearing in low cost MCUs and on low cost START boards. Just not documented in English. $11 simple...

RISC-V is appearing in low cost MCUs and on low cost START boards. Just not documented in English. $11 simple board... https://detail.tmall.com/item.htm?spm=a1z10.4-b-s.w5003-21978304610.1.48fa306cBtYGKJ&id=60102035 6481&skuId=4380996691920 $50 Full featured Eval board... https://detail.tmall.com/item.htm?spm=a1z10.4-b-s.w5003-21978304610.2.48fa306cBtYGKJ&id=60146141 8296&skuId=4210


Embedded Intel Optane?

Started by Rick C in comp.arch.embedded2 days ago 1 reply

I was asking about Optane memory in another group and it occurred to me that while it is to expensive to make a SSD from, is it affordable to use...

I was asking about Optane memory in another group and it occurred to me that while it is to expensive to make a SSD from, is it affordable to use at smaller scale? It is supposed to be cheaper, but slower than RAM, faster but more expensive than Flash. Would Optane be compatible enough with MCU processing that it could be included on chip instead of Flash? They have to play ga


No dynamic memory at all: newlib and sprintf

Started by pozz in comp.arch.embedded2 weeks ago 11 replies

I'd like to avoid using dynamic memory (heap) at all. I'm using gcc for ARM and newlib (really I'm using NXP MCUXpresso IDE, but I don't think...

I'd like to avoid using dynamic memory (heap) at all. I'm using gcc for ARM and newlib (really I'm using NXP MCUXpresso IDE, but I don't think this is important). When the code is minimal, I noticed heap related functions (malloc, free and so on) aren't included in the output binary file. However, as soon as I use sprintf-like functions, heap is used. I looked at the newlib source cod...


What is TI PRU-ICSS processor core?

Started by Dave Nadler in comp.arch.embedded3 weeks ago 6 replies

TI's web page is here, but doesn't explain origin of instruction set? http://processors.wiki.ti.com/index.php/PRU-ICSS Anybody here have...

TI's web page is here, but doesn't explain origin of instruction set? http://processors.wiki.ti.com/index.php/PRU-ICSS Anybody here have experience with these parts, or know where they're used? Thanks, Best Regards, Dave


Input-driven vs event-driven state machines in embedded software

Started by StateMachineCOM in comp.arch.embedded3 weeks ago 10 replies

There is a lot of confusion about state machines in embedded software. Some example of this is the recent discussion in this forum: "FSM - Mealy...

There is a lot of confusion about state machines in embedded software. Some example of this is the recent discussion in this forum: "FSM - Mealy vs Moore". It seems to me that the real question to ask is not Mealy vs Moore, but "input-driven" vs "event-driven" state machines. "Input-driven" state machines seem to be far more popular, and most examples published in various magazin


FSM - Mealy vs. Moore

Started by Rick C in comp.arch.embedded1 month ago 13 replies

I'm discussing Finite State Machine (FSM) design in logic with some hardware folks and I thought I'd ask what a software community thinks. ...

I'm discussing Finite State Machine (FSM) design in logic with some hardware folks and I thought I'd ask what a software community thinks. Moore - outputs are only a function of the state. Mealy - outputs are a function of both inputs and state. So considering this issue, it seems it comes down to as Wikipedia says, "In Mealy machines, input change can cause output change


Remove unused data from the build output

Started by pozz in comp.arch.embedded1 month ago 4 replies

I have defined a myassert(char *module, int line) function that uses the arguments only in Debug build. myassert() is defined in myassert.c and...

I have defined a myassert(char *module, int line) function that uses the arguments only in Debug build. myassert() is defined in myassert.c and declared in myassert.h. In myassert.h there's also a macro that tests an expression: #define MYASSERT(test) (test) ? (void) 0 : myassert(thisModule, (int)__LINE__)) Now in module.c: #include "myassert.h" static char thisMo...


Codewright Failure

Started by rickman in comp.arch.embedded1 month ago 20 replies

Newsgroups are my last ditch resource for bugs with old software. I know Codewright is old and no longer supported. But I have it and I'm...

Newsgroups are my last ditch resource for bugs with old software. I know Codewright is old and no longer supported. But I have it and I'm not ready to switch. Meanwhile, something happend while I was running in safe mode and now Codewright is messed up when running in standard windows mode. I can open files, but I can't select anything in them or do any edits. I can't even position...


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