How to Deploy Local LLMs for Embedded Software Development: Hardware Selection and Trade-offs
In this post, I map the LLM terminology covered in the previous post to real hardware decisions. I walk through memory sizing depending on different parameters, the core trade-off between discrete GPU VRAM and unified memory. Finally, I describe a workflow to help you identify which setup is right for your workflow.
My device crashed in the field. How do I figure out why?
Embedded systems often crash in the field, leaving developers with nothing more than a disconnected device and zero visibility into the cause. When traditional debugging is impossible, coredumps provide the essential post-mortem data required to reconstruct the system’s final moments. Learn how to configure Zephyr RTOS and the Spotflow SDK to automatically capture, store, and analyze critical crash information—including stack traces, CPU registers, and variable states—remotely. Mastering this workflow allows you to diagnose and resolve elusive firmware faults long after a device has rebooted, transforming your remote debugging capabilities.
Delta Encoding With Feather and Pandas
Delta encoding can reduce the storage size of a data set in compressed form, and is well-suited in particular for timestamps of regularly-sampled data. This article describes a real use case and examines the reduction in storage size when using delta encoding.
Can Spotflow Solve Remote Debugging for Embedded Systems?
Debugging complex embedded systems in the field requires more than just local logs and JTAG probes. To maintain visibility across a scaling fleet, engineers need robust cloud-based observability. This guide explores the integration of Spotflow with the Zephyr RTOS on an NXP FRDM-MCXN947 board. Learn how to configure your development workspace, navigate common Python versioning hurdles, and establish a secure MQTT connection. Follow along as we bridge the gap between local firmware execution and remote telemetry, setting the foundation for true fleet-wide monitoring and proactive system management.
C Is for Complacency: Friendship Is Not Transitive, but What About Module Dependencies?
In the C programming language, if module A depends on module B, and module B depends on module C, does this mean module A depends on module C? Well, it depends....
Ten Little Algorithms, Part 8: Miller-Rabin Primality Test (and Living with Uncertainty)
Part 8 of the Ten Little Algorithms series: A look at the Miller-Rabin primality test, along with Pollard's rho algorithm for factoring, and some perspectives on very low levels of uncertainty.
How to Deploy Local LLMs for Embedded Software Development: Terminology and Motivation
In this blog post series, I walk you through creating a fully local, offline AI pipeline. In this first post, I outline the motivation and relevant terminology that are important before we dive into hardware selection and implementation of the pipeline.
2026 Embedded Online Conference: Your Guide to This Year's Schedule
Welcome to the 2026 Embedded Online Conference! As in previous years, the event blends pre-recorded on-demand talks with live Zoom sessions including keynotes, workshops, and track panel discussions. We've curated the schedule to deliver high-value technical content across the embedded systems landscape.
Before we dive into the day-by-day schedule, here's a quick overview of how the conference works:
On-demand and live, deliberately blendedMost talks are pre-recorded and drop...
Your architecture was decided before you opened the schematic
Engineering teams often treat requirements as a simple feature checklist, but they actually hold the blueprint for your software architecture. By analyzing constraints collectively rather than in isolation, you can define critical architectural patterns—such as task scheduling and abstraction levels—long before the first schematic is drawn. This proactive approach eliminates wasted complexity, reduces development time, and allows software needs to inform hardware choices early in the cycle. Discover how to shift your design mindset to build lean, purposeful systems that align perfectly with business objectives from day one.
My Lowest-Friction Embedded Project Was Also the One That Shouldn't Have Worked
Ralph Hempel recounts the LEGO Powered Up rework that, against every external constraint, turned into the lowest-friction embedded development environment of his career. The talk connects the specific tools and habits that made it work to five soft qualities that any struggling team can start building with small experiments, not big-bang process changes.
Cracking the (embedded) Coding Interview
Landing your first embedded job is thrilling, but surviving months of interviews is brutal. This post condenses one engineer’s recent experience into a pragmatic playbook, covering behavioral prep, targeted coding practice, and the embedded theory you actually get asked about. Read it for a focused roadmap: what to study, which platforms to use, and how to present yourself so interviewers root for you.
Supply Chain Games: What Have We Learned From the Great Semiconductor Shortage of 2021? (Part 5)
Most of the time a wafer spends in a fab is spent waiting in queues, not being processed. Jason Sachs peels back why cycle times stretch weeks to months, covering WIP accounting, die and wafer banks, the days per mask layer metric, and how variability and utilization tradeoffs turned fab behavior into a major factor in the 2021 chip shortage.
VHDL tutorial
Gene Breniman presents a hands-on VHDL walkthrough for a programmable clock divider implemented on a Xilinx CoolRunner CPLD (XC2C32A). The example shows how to declare ports and internal signals, implement a clock-division process with reset and falling-edge detection, and create a simple addressable latch to select clock rates from a 40MHz master clock. It’s a compact, practical guide for embedded engineers learning VHDL and CPLD design.
Lost Secrets of the H-Bridge, Part V: Gate Drives for Dummies
Learn the most important issues in power MOSFET and IGBT gate drives: - Transistor behavior during switching - Calculating turn-on and turn-off times - Passive components used between gate drive IC and transistor - Reverse recovery - Capacitively-coupled spurious turn-on - Factors that influence a good choice of turn-on and turn-off times - Gate drive supply voltage management - Bootstrap gate drives - Design issues impacting reliability
Understanding Microchip 8-bit PIC Configuration
The second post of a five part series picks up getting started developing with Microchip 8-bit PIC Microcontroller by examining the how and why of processor configuration. Topics discussed include selecting the oscillator to use during processor startup and refining the configuration once the application starts. A walk through of the code generated by the Microchip IDE provides a concrete example of the specific Configuration Word and SFR values needed to configure the project specific clock configuration.
How to Deploy Local LLMs for Embedded Software Development: Hardware Selection and Trade-offs
In this post, I map the LLM terminology covered in the previous post to real hardware decisions. I walk through memory sizing depending on different parameters, the core trade-off between discrete GPU VRAM and unified memory. Finally, I describe a workflow to help you identify which setup is right for your workflow.
Ten Little Algorithms, Part 2: The Single-Pole Low-Pass Filter
Jason Sachs shows how a single-pole IIR low-pass filter, implementable in one line y += alpha * (x - y), tames noise in embedded signals without floating point. The post explains how to compute alpha from tau and delta-t, practical tradeoffs like phase lag and oversampling, and fixed-point pitfalls including how many extra state bits you need to avoid quantization. Short, practical, and code-ready.
VHDL tutorial - A practical example - part 1 - Hardware
Gene Breniman walks through a practical CPLD-based data acquisition engine built for a low-power handheld instrument, focusing on hardware choices, signal flow, and pin assignments. The article explains component selection including a PCM1870 ADC, CY14B101Q2 serial nvSRAM, and an XC2C64A CPLD, and shows how the CPLD acts as an SPI sequencer and I2S clock master while minimizing microcontroller pins and power draw.
So You Want To Be An Embedded Systems Developer
This is a practical, boots-on-the-ground roadmap of books, videos, and inexpensive dev boards you can actually use to become an embedded systems developer. It contrasts hobbyist platforms like Arduino and Raspberry Pi with professional ARM-based evaluation kits, lists must-read resources for firmware, real-time systems, and testing, and emphasizes hands-on practice and the safety responsibilities of working with real-world devices.
Creating a Hardware Abstraction Layer (HAL) in C
In my last post, C to C++: Using Abstract Interfaces to Create Hardware Abstraction Layers (HAL), I discussed how vital hardware abstraction layers are and how to use a C++ abstract interface to create them. You may be thinking, that’s great for C++, but I work in C! How do I create a HAL that can easily swap in and out different drivers? In today’s post, I will walk through exactly how to do that while using the I2C bus as an example.
Introduction to Microcontrollers - Beginnings
Mike Silva's beginner tutorial series walks through core microcontroller concepts and practical steps to get started, from wiring an LED blinky to understanding startup code. He compares embedded and desktop programming, explains why C and assembly matter, and introduces AVR and STM32 Cortex-M3 toolchains and hardware. Expect clear examples, no-nonsense tool advice, and the essential hardware knowledge to move from simulator to a real board.
Analyzing the Linker Map file with a little help from the ELF and the DWARF
Running out of Flash or RAM is a familiar pain for firmware engineers, and the linker map only tells part of the story. This post shows how to combine the linker MAP with ELF symbol tables and DWARF debug info to recover static symbols, sizes, and source files that the map omits. It also describes a C# WinForms viewer that automates the parsing with binutils and helps you spot module and symbol-level memory waste.
VHDL tutorial - A practical example - part 3 - VHDL testbench
Gene Breniman walks a complete VHDL testbench workflow for a CPLD-based data acquisition engine, from Xilinx ISE testbench generation to stimulus processes. He shows clock and SPI gating, a simulated ADC data generator tied to ADC_LRCK and ADC_BCK, and how simulation revealed a timing bug in the nvSRAM header that was then fixed in the VHDL. Practical and hands-on for verification work.
MSP430 Launchpad Tutorial - Part 2 - Interrupts and timers
Interrupts let the MSP430 respond to events without wasting CPU time, and this tutorial walks through using TimerA and Port 1 interrupts on the LaunchPad. Enrico shows how to configure TACTL, CCR0 and CCTL0 to generate a periodic TimerA interrupt, and how to set up P1IE, P1IES and P1IFG to catch a button press. The code toggles LEDs and enters LPM0 while waiting for interrupts.
Chebyshev Approximation and How It Can Help You Save Money, Win Friends, and Influence People
Are expensive math libraries or huge lookup tables eating CPU and flash on your microcontroller? In this practical guide Jason Sachs shows how Chebyshev polynomial approximation (with range reduction, splitting, and small interpolated tables) can give near-minimax accuracy while using far less code and runtime. The post compares Taylor series, plain and interpolated tables, and explains how to fit empirical sensor data and evaluate coefficients efficiently.
How FPGAs work, and why you'll buy one
Yossi Kreinin argues that FPGAs are no longer just programmable gate arrays, they are becoming a mainstream programmable acceleration and I/O platform. The article explains how modern FPGAs pair a sea of LUTs and switch boxes with DSP slices, RAMs, and hard CPUs to deliver massive parallelism, deterministic timing, and surprising energy efficiency, and it includes a readable Verilog convolution example to show how this works in practice.
MSP430 LaunchPad Tutorial - Part 4 - UART Transmission
Want to stream sensor or debug data from an MSP430 LaunchPad to a PC or Bluetooth module? Enrico swaps in an MSP430G2553 and shows how to configure SMCLK, P1 pin multiplexing, and UCA0 baud/dividers (with modulation) to approximate 115200 baud. The post also walks through interrupt-driven RX/TX handling and a low-power wait loop that sends a "Hello World" reply on demand.
How to Read a Power MOSFET Datasheet
Jason Sachs takes a soapbox to stop a recurring mistake: misreading power MOSFET datasheets. This practical guide separates marketing blurbs and typical graphs from the specifications you can actually rely on, and explains how to use RDS(on), VGS, gate charge, SOA and thermal data in real designs. Read this before you pick a MOSFET or size a gate driver.
Understanding and Preventing Overflow (I Had Too Much to Add Last Night)
Integer overflow is stealthier than you think, and in embedded systems it can break control loops or corrupt data. Jason Sachs walks through the usual culprits, including addition, subtraction, multiplication, shifting and Q15 fixed-point traps, plus C-specific pitfalls such as undefined signed overflow and INT_MIN edge cases. He then lays out practical defenses: prefer fixed-width types, widen and saturate intermediates, enable wraparound where appropriate, and reason about modular congruence for compound arithmetic.
Adventures in Signal Processing with Python
Jason Sachs shows how PyLab (numpy, scipy, matplotlib) can handle many signal-processing and visualization tasks engineers usually reach for MATLAB to do. He walks through practical examples including PWM ripple, two pole RC filters, and symbolic math with SymPy, and shares real-world installation tips and trade-offs. The post closes with pointers to IPython and pandas to speed interactive analysis and data handling.
2026 Embedded Online Conference: Your Guide to This Year's Schedule
Welcome to the 2026 Embedded Online Conference! As in previous years, the event blends pre-recorded on-demand talks with live Zoom sessions including keynotes, workshops, and track panel discussions. We've curated the schedule to deliver high-value technical content across the embedded systems landscape.
Before we dive into the day-by-day schedule, here's a quick overview of how the conference works:
On-demand and live, deliberately blendedMost talks are pre-recorded and drop...
The Embedded Systems Summit - Risk Free Early Bird
The inaugural Embedded Systems Summit runs October 14-16, 2025 in Silicon Valley, limited to just 70 seats to keep things intentionally intimate. Day one is a full-day Zephyr Bootcamp, followed by two days of talks and workshops focused on real-world embedded challenges. Early Bird registration comes with a flexible cancellation policy to reduce risk and help you secure discounted hotel space. Lock your seat before the Early Bird window closes.
The Embedded Systems Summit 2025 - Registration are now open!
Registration is open for the inaugural Embedded Systems Summit 2025, happening October 14–16 at the Sonesta Silicon Valley. Stephane Boucher and Jacob Beningo put together a small, in-person event focused on hands-on Zephyr training and compact conference sessions to boost embedded careers. Expect a full-day Zephyr Developer Bootcamp, two days of technical talks on RTOS, tooling, and testing, and only 70 seats with an early-bird discount.
Call for Speakers: Inaugural Embedded Systems Summit
A new, practical in-person event for embedded engineers lands in Silicon Valley this October. Stephane Boucher and Jacob are inviting hands-on, engineer-to-engineer talks for the inaugural Embedded Systems Summit, October 14-16, 2025, with emphasis on RTOS, AI, bare-metal, IoT, edge computing, security, tooling, and firmware architecture. Submit session proposals focused on lessons learned, debugging war stories, and reproducible design patterns by August 8, 2025.
The Inaugural Embedded Systems Summit is Coming to Silicon Valley!
Stephane Boucher and Jacob Beningo are launching the first Embedded Systems Summit, an in-person, engineer-run conference in Silicon Valley from October 14 to 16, 2025. Expect practical, hands-on sessions and familiar speakers from the Embedded Online Conference. Passes are limited, so read on to learn why this event could be a high-impact investment in your embedded engineering career.
2025 Embedded Online Conference: Your Guide to This Year's Schedule
Stephane Boucher lays out a clear day-by-day guide to the 2025 Embedded Online Conference, highlighting keynotes, live workshops, and new features. The post explains the new track-based group Q&A format moderated by Jacob Beningo, early release of sponsored talks on May 9, and an attendee-only Discord for networking and follow-ups. Use this guide to plan which sessions and panels to prioritize.
2024 Embedded Online Conference's Schedule
Packed with live workshops, keynotes, and dozens of on-demand talks, the 2024 Embedded Online Conference hands you a full week of embedded-systems learning. Most theatre talks and microtalks drop early on April 26 to let you binge ahead, while major workshops and keynotes run live on Zoom with multiple 20-minute Q&A sessions. Use the schedule to add sessions to your agenda and expect occasional last-minute changes.
EOC 2024 - I Will Attend Giveaways!
Win serious test gear by helping spread the word about the Embedded Online Conference, invites Stephane. Share the provided image on LinkedIn with #EOC2024 and #embeddedsystems by April 29 to enter raffles for gear like a LulzBot Mini 2, Saleae Logic Pro 8, Joulescope JS220, and a DSC-5300 oscilloscope. It only takes a few minutes to qualify.
Call for Bloggers!
Are you passionate about embedded systems? Do you have valuable insights, tips, or stories to share with the embedded community? Do you want to reach a large and engaged audience of embedded enthusiasts and professionals? We are currently looking at adding a few more inspired writers to our team of bloggers.
Get Involved: Contribute Quiz Questions for the Embedded Systems Community for a Chance to Win a LAP-C Pro!
Submit a Quiz Question for a chance to win a Zeroplus Lac-C Pro!
