Summary

This blog series introduces StrangeCPU, a novel CPU architecture centered on a token machine that maps 8-bit tokens to wide 32-bit (or larger) addresses. The author walks through the design rationale, implementation notes, and code examples useful for architects and implementers interested in unconventional ISA and addressing techniques.

Key Takeaways

• Understand the token-machine concept and how an 8-bit token resolves to addresses in a 32-bit address space.
• Apply design techniques for creating compact instruction encodings and unconventional addressing mechanisms.
• Implement and prototype the CPU concepts in HDL/FPGA and integrate supporting toolchain components.
• Evaluate trade-offs in microarchitecture, decoding complexity, and memory subsystem interaction for token-based ISAs.

Who Should Read This

Embedded systems engineers, CPU/ISA designers, FPGA developers, and firmware architects with an interest in unconventional CPU designs and low-level implementation details.

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