Front-end Hardware Engineer H/W modeling, synthesis, verification, prototyping and implementation Project management and documentation Setting up verification and regression suite PLDs (Xilinx FPGAs and CPLDs) ASIC (0.35um, 180nm, 130nm, and 40nm CMOS technologies) (SOI 140nm) Specialties: DSP: ------- Filters - FIR, IIR, CIC Synthesizers - NCO, DDS, ADPLL

Re: RISC Processor Architecture

Reply posted 4 years ago (02/08/2017)
Thanks a lot for your feedback. Appreciated.I checked the text book and it seems to be for software oriented engineers more than hardware.Regards.

Re: RISC Processor Architecture

Reply posted 4 years ago (02/08/2017)
Thanks a lot for your feedback. Appreciated.Regards.

Re: RISC Processor Architecture

Reply posted 4 years ago (02/08/2017)
Hi Pedro,This is exactly what I am looking forward to, build my own to test over an FPGA. Thanks a lot for your feedback. Appreciated.I checked the text book and...

RISC Processor Architecture

New thread started 4 years ago
Hi Everyone,I am desperate for a recommendation for a text book or a reference as a kick start for RISC processor architectures. I am looking for something that...

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