Hello All,
did anybody scrutinize closely why Freecale tells us to use at least
(!) 400nF to decouple the 2,5V core voltage?
Especially with the small 48 pin devices that's a pity because of the
size of the capacitor(s).
I also wonder why the capacitance has been increased over the years.
Early documents suggested 2*47nF as minimum capacitance, 1/4 of the
current value.
I submitted a service request but got no concrete explanation.
Also interesting would be a worst case scenario. I found that the
2,5V regulator shows slightly lower stability under light load
conditions, but I found that even in this case, the stability was
sufficient with 47nF on a 9S12C32. I tested the settling behaviour
while injecting a 2,5mApp current to Vdd - the usual procedure to
test regulator stability. Noise from the S12 core itself was only
several millivolts.
TIA,
Oliver
--
Oliver Betz, Muenchen
Vdd (core voltage) decoupling requirements
Started by ●November 8, 2006
Reply by ●November 9, 20062006-11-09
Oliver Betz wrote:
> Hello All,
>
> did anybody scrutinize closely why Freecale tells us to use at least
> (!) 400nF to decouple the 2,5V core voltage?
Hm, where did you find this? Datasheet I have tells a number of times to
decouple with 100-220nF. Are you talking about Voltage Regulator Min
Capacitive Load? C32 datasheet v1.20, p670. Min value here is bit confusing.
Usually amplifiers have specified max capacitance of load they are able to
drive, lower C is and must be OK. Does max value in table A-24 mean that
some C32 VREGs are able to drive 12uF and some to drive only 400nF? If so
then max and typical columns are of no use.
Edward
>
> Especially with the small 48 pin devices that's a pity because of the
> size of the capacitor(s).
>
> I also wonder why the capacitance has been increased over the years.
> Early documents suggested 2*47nF as minimum capacitance, 1/4 of the
> current value.
>
> I submitted a service request but got no concrete explanation.
>
> Also interesting would be a worst case scenario. I found that the
> 2,5V regulator shows slightly lower stability under light load
> conditions, but I found that even in this case, the stability was
> sufficient with 47nF on a 9S12C32. I tested the settling behaviour
> while injecting a 2,5mApp current to Vdd - the usual procedure to
> test regulator stability. Noise from the S12 core itself was only
> several millivolts.
>
> TIA,
>
> Oliver
>
> --
> Oliver Betz, Muenchen
> Yahoo! Groups Links
>
> Hello All,
>
> did anybody scrutinize closely why Freecale tells us to use at least
> (!) 400nF to decouple the 2,5V core voltage?
Hm, where did you find this? Datasheet I have tells a number of times to
decouple with 100-220nF. Are you talking about Voltage Regulator Min
Capacitive Load? C32 datasheet v1.20, p670. Min value here is bit confusing.
Usually amplifiers have specified max capacitance of load they are able to
drive, lower C is and must be OK. Does max value in table A-24 mean that
some C32 VREGs are able to drive 12uF and some to drive only 400nF? If so
then max and typical columns are of no use.
Edward
>
> Especially with the small 48 pin devices that's a pity because of the
> size of the capacitor(s).
>
> I also wonder why the capacitance has been increased over the years.
> Early documents suggested 2*47nF as minimum capacitance, 1/4 of the
> current value.
>
> I submitted a service request but got no concrete explanation.
>
> Also interesting would be a worst case scenario. I found that the
> 2,5V regulator shows slightly lower stability under light load
> conditions, but I found that even in this case, the stability was
> sufficient with 47nF on a 9S12C32. I tested the settling behaviour
> while injecting a 2,5mApp current to Vdd - the usual procedure to
> test regulator stability. Noise from the S12 core itself was only
> several millivolts.
>
> TIA,
>
> Oliver
>
> --
> Oliver Betz, Muenchen
> Yahoo! Groups Links
>
Reply by ●November 9, 20062006-11-09
>Edward Karpicz wrote:
>> Oliver Betz wrote:
>> Hello All,
>
> did anybody scrutinize closely why Freescale tells us to use at least
> (!) 400nF to decouple the 2,5V core voltage?
>Hm, where did you find this? Data sheet I have tells a number of times to
decouple with 100-220nF. Are you talking about Voltage Regulator Min
Capacitive Load? C32 data sheet v1.20, p670. Min value here is bit
confusing.
Usually amplifiers have specified max capacitance of load they are able to
drive, lower C is and must be OK. Does max value in table A-24 mean that
some C32 VREGs are able to drive 12uF and some to drive only 400nF? If so
then max and typical columns are of no use.
Op amps are not really a good comparison, but you should find that an op
amp may become stable with a very high capacitive load, this aspect is
not documented. The best comparison is with a band gap references the
loading capacitance should be less than a certain amount or greater than
a higher amount. As you need some decoupling capacitance then the
greater value makes the internal amplifier stable. Although I doubt that
there is any limit to how high the capacitance value can be, but it is
always best to do what the manufacturer recommends.
Andrew Lohmann AMIIE
Design Engineer
PLEASE NOTE NEW EMAIL ADDRESS IS:
a...@bellinghamandstanley.co.uk
Bellingham + Stanley Ltd.
Longfield Road, Tunbridge Wells, Kent, TN2 3EY, England.
Tel: +44 (0) 1892 500400
Fax: +44 (0) 1892 543115
Website: www.bs-ltd.com
-----------------------------Disclaimer-----------------------------
This communication contains information which is confidential and may also be privileged. It is for the exclusive use of the addressee. If you are not the addressee please note that any distribution, reproduction, copying, publication or use of this communication or the information is prohibited. If you have received this communication in error, please contact us immediately and also delete the communication from your computer. We accept no liability for any loss or damage suffered by any person arising from use of this e-mail.
-----------------------------Disclaimer-----------------------------
>> Oliver Betz wrote:
>> Hello All,
>
> did anybody scrutinize closely why Freescale tells us to use at least
> (!) 400nF to decouple the 2,5V core voltage?
>Hm, where did you find this? Data sheet I have tells a number of times to
decouple with 100-220nF. Are you talking about Voltage Regulator Min
Capacitive Load? C32 data sheet v1.20, p670. Min value here is bit
confusing.
Usually amplifiers have specified max capacitance of load they are able to
drive, lower C is and must be OK. Does max value in table A-24 mean that
some C32 VREGs are able to drive 12uF and some to drive only 400nF? If so
then max and typical columns are of no use.
Op amps are not really a good comparison, but you should find that an op
amp may become stable with a very high capacitive load, this aspect is
not documented. The best comparison is with a band gap references the
loading capacitance should be less than a certain amount or greater than
a higher amount. As you need some decoupling capacitance then the
greater value makes the internal amplifier stable. Although I doubt that
there is any limit to how high the capacitance value can be, but it is
always best to do what the manufacturer recommends.
Andrew Lohmann AMIIE
Design Engineer
PLEASE NOTE NEW EMAIL ADDRESS IS:
a...@bellinghamandstanley.co.uk
Bellingham + Stanley Ltd.
Longfield Road, Tunbridge Wells, Kent, TN2 3EY, England.
Tel: +44 (0) 1892 500400
Fax: +44 (0) 1892 543115
Website: www.bs-ltd.com
-----------------------------Disclaimer-----------------------------
This communication contains information which is confidential and may also be privileged. It is for the exclusive use of the addressee. If you are not the addressee please note that any distribution, reproduction, copying, publication or use of this communication or the information is prohibited. If you have received this communication in error, please contact us immediately and also delete the communication from your computer. We accept no liability for any loss or damage suffered by any person arising from use of this e-mail.
-----------------------------Disclaimer-----------------------------
Reply by ●November 9, 20062006-11-09
Edward Karpicz wrote:
> > did anybody scrutinize closely why Freecale tells us to use at least
> > (!) 400nF to decouple the 2,5V core voltage?
>
> Hm, where did you find this?
you also found it, C32 data sheet.
> Datasheet I have tells a number of times to
> decouple with 100-220nF. Are you talking about Voltage Regulator Min
where did you find this? "Early documents" as EB376 or data sheets of
other derivatives, usually "per pin" where two pins are supplied for
Vdd (2,5V core)?
> Capacitive Load? C32 datasheet v1.20, p670. Min value here is bit confusing.
No, it's not confusing - it's the minimum allowed capacitance.
> Usually amplifiers have specified max capacitance of load they are able to
Not voltage regulators.
> drive, lower C is and must be OK.
Not for all voltage regulators.
> Does max value in table A-24 mean that
> some C32 VREGs are able to drive 12uF and some to drive only 400nF? If so
No, it states that 400nF..12uF is acceptable, 200nF ot 20uF are not
acceptable.
Oliver
--
Oliver Betz, Muenchen
> > did anybody scrutinize closely why Freecale tells us to use at least
> > (!) 400nF to decouple the 2,5V core voltage?
>
> Hm, where did you find this?
you also found it, C32 data sheet.
> Datasheet I have tells a number of times to
> decouple with 100-220nF. Are you talking about Voltage Regulator Min
where did you find this? "Early documents" as EB376 or data sheets of
other derivatives, usually "per pin" where two pins are supplied for
Vdd (2,5V core)?
> Capacitive Load? C32 datasheet v1.20, p670. Min value here is bit confusing.
No, it's not confusing - it's the minimum allowed capacitance.
> Usually amplifiers have specified max capacitance of load they are able to
Not voltage regulators.
> drive, lower C is and must be OK.
Not for all voltage regulators.
> Does max value in table A-24 mean that
> some C32 VREGs are able to drive 12uF and some to drive only 400nF? If so
No, it states that 400nF..12uF is acceptable, 200nF ot 20uF are not
acceptable.
Oliver
--
Oliver Betz, Muenchen
Reply by ●November 9, 20062006-11-09
Andrew,
thanks for correcting me. I should sleep more.
Edward
----- Original Message -----
From: "Andrew Lohmann"
To: <6...>
Sent: Thursday, November 09, 2006 2:00 PM
Subject: Re: [68HC12] Vdd (core voltage) decoupling requirements
> >Edward Karpicz wrote:
> >> Oliver Betz wrote:
>
> >> Hello All,
> >
> > did anybody scrutinize closely why Freescale tells us to use at least
> > (!) 400nF to decouple the 2,5V core voltage?
>
> >Hm, where did you find this? Data sheet I have tells a number of times to
> decouple with 100-220nF. Are you talking about Voltage Regulator Min
> Capacitive Load? C32 data sheet v1.20, p670. Min value here is bit
> confusing.
> Usually amplifiers have specified max capacitance of load they are able to
> drive, lower C is and must be OK. Does max value in table A-24 mean that
> some C32 VREGs are able to drive 12uF and some to drive only 400nF? If so
> then max and typical columns are of no use.
>
> Op amps are not really a good comparison, but you should find that an op
> amp may become stable with a very high capacitive load, this aspect is
> not documented. The best comparison is with a band gap references the
> loading capacitance should be less than a certain amount or greater than
> a higher amount. As you need some decoupling capacitance then the
> greater value makes the internal amplifier stable. Although I doubt that
> there is any limit to how high the capacitance value can be, but it is
> always best to do what the manufacturer recommends.
>
> Andrew Lohmann AMIIE
> Design Engineer
>
> PLEASE NOTE NEW EMAIL ADDRESS IS:
> a...@bellinghamandstanley.co.uk
>
> Bellingham + Stanley Ltd.
> Longfield Road, Tunbridge Wells, Kent, TN2 3EY, England.
> Tel: +44 (0) 1892 500400
> Fax: +44 (0) 1892 543115
> Website: www.bs-ltd.com
>
> -----------------------------Disclaimer-----------------------------
>
> This communication contains information which is confidential and may also
> be privileged. It is for the exclusive use of the addressee. If you are
> not the addressee please note that any distribution, reproduction,
> copying, publication or use of this communication or the information is
> prohibited. If you have received this communication in error, please
> contact us immediately and also delete the communication from your
> computer. We accept no liability for any loss or damage suffered by any
> person arising from use of this e-mail.
>
> -----------------------------Disclaimer-----------------------------
> Yahoo! Groups Links
>
thanks for correcting me. I should sleep more.
Edward
----- Original Message -----
From: "Andrew Lohmann"
To: <6...>
Sent: Thursday, November 09, 2006 2:00 PM
Subject: Re: [68HC12] Vdd (core voltage) decoupling requirements
> >Edward Karpicz wrote:
> >> Oliver Betz wrote:
>
> >> Hello All,
> >
> > did anybody scrutinize closely why Freescale tells us to use at least
> > (!) 400nF to decouple the 2,5V core voltage?
>
> >Hm, where did you find this? Data sheet I have tells a number of times to
> decouple with 100-220nF. Are you talking about Voltage Regulator Min
> Capacitive Load? C32 data sheet v1.20, p670. Min value here is bit
> confusing.
> Usually amplifiers have specified max capacitance of load they are able to
> drive, lower C is and must be OK. Does max value in table A-24 mean that
> some C32 VREGs are able to drive 12uF and some to drive only 400nF? If so
> then max and typical columns are of no use.
>
> Op amps are not really a good comparison, but you should find that an op
> amp may become stable with a very high capacitive load, this aspect is
> not documented. The best comparison is with a band gap references the
> loading capacitance should be less than a certain amount or greater than
> a higher amount. As you need some decoupling capacitance then the
> greater value makes the internal amplifier stable. Although I doubt that
> there is any limit to how high the capacitance value can be, but it is
> always best to do what the manufacturer recommends.
>
> Andrew Lohmann AMIIE
> Design Engineer
>
> PLEASE NOTE NEW EMAIL ADDRESS IS:
> a...@bellinghamandstanley.co.uk
>
> Bellingham + Stanley Ltd.
> Longfield Road, Tunbridge Wells, Kent, TN2 3EY, England.
> Tel: +44 (0) 1892 500400
> Fax: +44 (0) 1892 543115
> Website: www.bs-ltd.com
>
> -----------------------------Disclaimer-----------------------------
>
> This communication contains information which is confidential and may also
> be privileged. It is for the exclusive use of the addressee. If you are
> not the addressee please note that any distribution, reproduction,
> copying, publication or use of this communication or the information is
> prohibited. If you have received this communication in error, please
> contact us immediately and also delete the communication from your
> computer. We accept no liability for any loss or damage suffered by any
> person arising from use of this e-mail.
>
> -----------------------------Disclaimer-----------------------------
> Yahoo! Groups Links
>
Reply by ●November 9, 20062006-11-09
Oliver Betz wrote:
> Edward Karpicz wrote:
>
>> > did anybody scrutinize closely why Freecale tells us to use at least
>> > (!) 400nF to decouple the 2,5V core voltage?
>>
>> Hm, where did you find this?
> you also found it, C32 data sheet.
Yeah, thanks. I already have units in field and in production, C32 in QFP48
and only 220nF on VDD1. Wouldn't look at it again if you didn't start this
thread. Oops, rev1.20 p68: "In 48LQFP and 52LQFP package versions, VDD2 is
not available. Thus 470nF must be connected to VDD1."
>
>> Datasheet I have tells a number of times to
>> decouple with 100-220nF. Are you talking about Voltage Regulator Min
>
> where did you find this? "Early documents" as EB376 or data sheets of
> other derivatives, usually "per pin" where two pins are supplied for
> Vdd (2,5V core)?
>
Sorry, checked again and not a number of times, but at least datasheet
rev1.20 p466:
"16.2.3 VDD, VSS - Regulator Output1 (Core Logic)
Signals VDD/VSS are the primary outputs of VREG3V3V2 that provide the power
supply for the core logic. These signals are connected to device pins to
allow external decoupling capacitors (100 nF...220 nF, X7R ceramic)."
>> Capacitive Load? C32 datasheet v1.20, p670. Min value here is bit
>> confusing.
>
> No, it's not confusing - it's the minimum allowed capacitance.
Sorry for this nonsens, a lack of sleep.
[skip]
Edward
>
> Oliver
> --
> Oliver Betz, Muenchen
> Edward Karpicz wrote:
>
>> > did anybody scrutinize closely why Freecale tells us to use at least
>> > (!) 400nF to decouple the 2,5V core voltage?
>>
>> Hm, where did you find this?
> you also found it, C32 data sheet.
Yeah, thanks. I already have units in field and in production, C32 in QFP48
and only 220nF on VDD1. Wouldn't look at it again if you didn't start this
thread. Oops, rev1.20 p68: "In 48LQFP and 52LQFP package versions, VDD2 is
not available. Thus 470nF must be connected to VDD1."
>
>> Datasheet I have tells a number of times to
>> decouple with 100-220nF. Are you talking about Voltage Regulator Min
>
> where did you find this? "Early documents" as EB376 or data sheets of
> other derivatives, usually "per pin" where two pins are supplied for
> Vdd (2,5V core)?
>
Sorry, checked again and not a number of times, but at least datasheet
rev1.20 p466:
"16.2.3 VDD, VSS - Regulator Output1 (Core Logic)
Signals VDD/VSS are the primary outputs of VREG3V3V2 that provide the power
supply for the core logic. These signals are connected to device pins to
allow external decoupling capacitors (100 nF...220 nF, X7R ceramic)."
>> Capacitive Load? C32 datasheet v1.20, p670. Min value here is bit
>> confusing.
>
> No, it's not confusing - it's the minimum allowed capacitance.
Sorry for this nonsens, a lack of sleep.
[skip]
Edward
>
> Oliver
> --
> Oliver Betz, Muenchen
Reply by ●November 9, 20062006-11-09
Edward Karpicz wrote:
[...]
> Sorry, checked again and not a number of times, but at least datasheet
> rev1.20 p466:
>
> "16.2.3 VDD, VSS - Regulator Output1 (Core Logic)
>
> Signals VDD/VSS are the primary outputs of VREG3V3V2 that provide the power
> supply for the core logic. These signals are connected to device pins to
> allow external decoupling capacitors (100 nF...220 nF, X7R ceramic)."
you are right, I missed this one. And since there is not stated that
this value is "per pin on a package with two Vdd pins", one could
think that 100nF total capacitance is sufficient.
BTW: I found one situation where 400nF makes the voltage regulator
output "nicer": waking up from STOP mode (where the core voltage is
reduced by ~200mV), it seems that the voltage regulator switches
slower to full power mode than the core starts consuming power,
therefore the voltage drops slightly. I measured 74mV drop after 40us
with a 47nF decoupling capacitor (16MHz crystal). Screenshots
available on request.
Although I don't think that this could be a problem, I can't be sure.
And I don't know whether _that_ is the reason why Motorola/Freescale
states 400nF min. capacitance.
Oliver
--
Oliver Betz, Muenchen
[...]
> Sorry, checked again and not a number of times, but at least datasheet
> rev1.20 p466:
>
> "16.2.3 VDD, VSS - Regulator Output1 (Core Logic)
>
> Signals VDD/VSS are the primary outputs of VREG3V3V2 that provide the power
> supply for the core logic. These signals are connected to device pins to
> allow external decoupling capacitors (100 nF...220 nF, X7R ceramic)."
you are right, I missed this one. And since there is not stated that
this value is "per pin on a package with two Vdd pins", one could
think that 100nF total capacitance is sufficient.
BTW: I found one situation where 400nF makes the voltage regulator
output "nicer": waking up from STOP mode (where the core voltage is
reduced by ~200mV), it seems that the voltage regulator switches
slower to full power mode than the core starts consuming power,
therefore the voltage drops slightly. I measured 74mV drop after 40us
with a 47nF decoupling capacitor (16MHz crystal). Screenshots
available on request.
Although I don't think that this could be a problem, I can't be sure.
And I don't know whether _that_ is the reason why Motorola/Freescale
states 400nF min. capacitance.
Oliver
--
Oliver Betz, Muenchen
Reply by ●November 10, 20062006-11-10
--- In 6..., "Oliver Betz" wrote:
> you are right, I missed this one. And since there is not stated that
> this value is "per pin on a package with two Vdd pins", one could
> think that 100nF total capacitance is sufficient.
Is it safe to just use 0.1uF in all my designs to be sure? I supposed
the only reason to need less is if smaller size is desired.
> you are right, I missed this one. And since there is not stated that
> this value is "per pin on a package with two Vdd pins", one could
> think that 100nF total capacitance is sufficient.
Is it safe to just use 0.1uF in all my designs to be sure? I supposed
the only reason to need less is if smaller size is desired.
Reply by ●November 10, 20062006-11-10
Jefferson Smith wrote:
> > you are right, I missed this one. And since there is not stated that
> > this value is "per pin on a package with two Vdd pins", one could
> > think that 100nF total capacitance is sufficient.
>
> Is it safe to just use 0.1uF in all my designs to be sure? I supposed
no, the data sheet says 400nF minimum.
> the only reason to need less is if smaller size is desired.
right. Or higher voltage => likely more robust device.
Oliver
--
Oliver Betz, Muenchen
> > you are right, I missed this one. And since there is not stated that
> > this value is "per pin on a package with two Vdd pins", one could
> > think that 100nF total capacitance is sufficient.
>
> Is it safe to just use 0.1uF in all my designs to be sure? I supposed
no, the data sheet says 400nF minimum.
> the only reason to need less is if smaller size is desired.
right. Or higher voltage => likely more robust device.
Oliver
--
Oliver Betz, Muenchen
Reply by ●November 10, 20062006-11-10
-----Original Message-----
From: 6... [mailto:6...] On Behalf
Of Oliver Betz
Sent: Saturday, 11 November 2006 4:26 AM
To: 6...
Subject: Re: [68HC12] Re: Vdd (core voltage) decoupling requirements
Jefferson Smith wrote:
> > you are right, I missed this one. And since there is not stated that
> > this value is "per pin on a package with two Vdd pins", one could
> > think that 100nF total capacitance is sufficient.
>
> Is it safe to just use 0.1uF in all my designs to be sure? I supposed
no, the data sheet says 400nF minimum.
> the only reason to need less is if smaller size is desired.
right. Or higher voltage => likely more robust device.
Oliver
--
Oliver Betz, Muenchen
At this rate has anyone seen failures as a consequence of not meeting
this requirement? If so, what sort of symptoms have been seen?
Jonathan
From: 6... [mailto:6...] On Behalf
Of Oliver Betz
Sent: Saturday, 11 November 2006 4:26 AM
To: 6...
Subject: Re: [68HC12] Re: Vdd (core voltage) decoupling requirements
Jefferson Smith wrote:
> > you are right, I missed this one. And since there is not stated that
> > this value is "per pin on a package with two Vdd pins", one could
> > think that 100nF total capacitance is sufficient.
>
> Is it safe to just use 0.1uF in all my designs to be sure? I supposed
no, the data sheet says 400nF minimum.
> the only reason to need less is if smaller size is desired.
right. Or higher voltage => likely more robust device.
Oliver
--
Oliver Betz, Muenchen
At this rate has anyone seen failures as a consequence of not meeting
this requirement? If so, what sort of symptoms have been seen?
Jonathan
