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EEPROM and RAM memory map

Started by Pascal April 25, 2005
Hello,

I would like to configure my 9s12dp256 to use register : 0-3FF, EEPROM 400-13FF, RAM 1400- 43FF

Is it possible? If yes, i don't find the correct value of INITEE and INITRM

An other question : if RAM is > at $4000 wich is a fixed flashed page, what append?

All of these adress questions are not clear for me....

Thank you very much

Regards




Hi Pascal.

Have a look in the "S12CPU15UG.pdf" manual, section "Module Mapping Control
(MMC)".

Overlap precedences:

Highest
-BDM (internal to Core) firmware or register space (hidden to user in
general)
-Internal register space
-RAM memory block
-EEPROM memory block
-On-chip Flash EEPROM or ROM
-Remaining external space
Lowest

However, block moving is more bound to block size, new address being a
multiple of block size rounded to next power of two boundary, then aligned
from bottom or top.
Better to check in specs.

Also some useful remapping compatible other several devices in:

http://www.freescale.com/files/microcontrollers/doc/eng_bulletin/EB386.pdf

EB386/D
Rev. 3, 07/2002
HCS12 D-family Compatibility Considerations

Regards,
Gilles At 03:18 PM 4/25/2005, you wrote:

>Hello,
>
>I would like to configure my 9s12dp256 to use register : 0-3FF, EEPROM
>400-13FF, RAM 1400- 43FF
>
>Is it possible? If yes, i don't find the correct value of INITEE and INITRM
>
>An other question : if RAM is > at $4000 wich is a fixed flashed page,
>what append?
>
>All of these adress questions are not clear for me....
>
>Thank you very much
>
>Regards >
>Yahoo! Groups Links




Thank you gilles for help

On my DP256 i program it :

INITRG = 0; /* lock registers block to 0x0000 */
asm nop;
INITRM = 0x40; /* RAM 0x4000 to 0x6FFF*/
INITEE = 0x11; /*eeprom 0x1000 to 0x1FFF */

Is it correct?

In this case what is about the 16k fixed page at $4000 to $7FFF? I don't understand very well

Thank you

Regards

----- Original Message -----
From: Gilles Blanquin
To: 68HC12@68HC...
Sent: Tuesday, April 26, 2005 9:30 AM
Subject: Re: [68HC12] EEPROM and RAM memory map
Hi Pascal.

Have a look in the "S12CPU15UG.pdf" manual, section "Module Mapping Control
(MMC)".

Overlap precedences:

Highest
-BDM (internal to Core) firmware or register space (hidden to user in
general)
-Internal register space
-RAM memory block
-EEPROM memory block
-On-chip Flash EEPROM or ROM
-Remaining external space
Lowest

However, block moving is more bound to block size, new address being a
multiple of block size rounded to next power of two boundary, then aligned
from bottom or top.
Better to check in specs.

Also some useful remapping compatible other several devices in:

http://www.freescale.com/files/microcontrollers/doc/eng_bulletin/EB386.pdf

EB386/D
Rev. 3, 07/2002
HCS12 D-family Compatibility Considerations

Regards,
Gilles At 03:18 PM 4/25/2005, you wrote:

>Hello,
>
>I would like to configure my 9s12dp256 to use register : 0-3FF, EEPROM
>400-13FF, RAM 1400- 43FF
>
>Is it possible? If yes, i don't find the correct value of INITEE and INITRM
>
>An other question : if RAM is > at $4000 wich is a fixed flashed page,
>what append?
>
>All of these adress questions are not clear for me....
>
>Thank you very much
>
>Regards >
>Yahoo! Groups Links
------
Yahoo! Groups Links

a.. To


Thank you Gilles :o)
----- Original Message -----
From: Gilles Blanquin
To: 68HC12@68HC...
Sent: Wednesday, April 27, 2005 3:21 PM
Subject: Re: [68HC12] EEPROM and RAM memory map
Hi Pascal.

If this is correct, it is up to you and your application.

Indeed, if you want to make the cpu see the entire eeprom, you need to move
it, because it is overlapped by the Register.

However, after reset, the ram is entirely visible by the cpu. It is not
necessary to move it.

So you could simply set:

INITEE = 0x41; /*eeprom 0x4000 to 0x4FFF */

and keep INITRM and INITEE to reset/default value. About the fixed flash $4000-7FFF:

Simply overlapped by the block you move over. Indeed, eeprom or ram have a
bigger priority than flash on address bus.

First make sure it is used in your .prm file. Then:

One solution:

The debugger might use this fixed flash within the bank window, because
this fixed flash is also accessible in $8000-BFFF (bank window) when PPAGE
== 0x3E.

The .prm file of your project might have the following line in comments:

/* PAGE_3E = READ_ONLY 0x3E8000 TO 0x3EBFFF; not used: equivalent to
ROM_4000 */

Enable this line, and also add in "DEFAULT_ROM" placement the "PAGE_3E"
segment.

Note that no flash room is lost, but you have less unbanked flash for "non
banked" code like ISR's, etc.

Another solution:
-----------------
set

ROM_4000 = READ_ONLY 0x5000 TO 0x7FFF;

..but you loose 4 kBytes!

So for sure the linker will not try to overlap eeprom and flash code (won't
link anyway).

Regards,
Gilles At 02:30 PM 4/27/2005, you wrote:

>Thank you gilles for help
>
>On my DP256 i program it :
>
> INITRG = 0; /* lock registers block to 0x0000 */
> asm nop;
> INITRM = 0x40; /* RAM 0x4000 to 0x6FFF*/
> INITEE = 0x11; /*eeprom 0x1000 to 0x1FFF */
>
>Is it correct?
>
>In this case what is about the 16k fixed page at $4000 to $7FFF? I don't
>understand very well
>
>Thank you
>
>Regards
>
> ----- Original Message -----
> From: Gilles Blanquin
> To: 68HC12@68HC...
> Sent: Tuesday, April 26, 2005 9:30 AM
> Subject: Re: [68HC12] EEPROM and RAM memory map >
> Hi Pascal.
>
> Have a look in the "S12CPU15UG.pdf" manual, section "Module Mapping
> Control
> (MMC)".
>
> Overlap precedences:
>
> Highest
> -BDM (internal to Core) firmware or register space (hidden to user in
> general)
> -Internal register space
> -RAM memory block
> -EEPROM memory block
> -On-chip Flash EEPROM or ROM
> -Remaining external space
> Lowest
>
> However, block moving is more bound to block size, new address being a
> multiple of block size rounded to next power of two boundary, then aligned
> from bottom or top.
> Better to check in specs.
>
> Also some useful remapping compatible other several devices in:
>
> http://www.freescale.com/files/microcontrollers/doc/eng_bulletin/EB386.pdf
>
> EB386/D
> Rev. 3, 07/2002
> HCS12 D-family Compatibility Considerations
>
> Regards,
> Gilles > At 03:18 PM 4/25/2005, you wrote:
>
> >Hello,
> >
> >I would like to configure my 9s12dp256 to use register : 0-3FF, EEPROM
> >400-13FF, RAM 1400- 43FF
> >
> >Is it possible? If yes, i don't find the correct value of INITEE and
> INITRM
> >
> >An other question : if RAM is > at $4000 wich is a fixed flashed page,
> >what append?
> >
> >All of these adress questions are not clear for me....
> >
> >Thank you very much
> >
> >Regards
> >
> >
> >
> >
> >
> >
> >Yahoo! Groups Links
> >
> >
> >
> >
> >
>------
> Yahoo! Groups Links
>
> a.. To >Yahoo! Groups Links
------
Yahoo! Groups Links

a.. To



Hi Pascal.

If this is correct, it is up to you and your application.

Indeed, if you want to make the cpu see the entire eeprom, you need to move
it, because it is overlapped by the Register.

However, after reset, the ram is entirely visible by the cpu. It is not
necessary to move it.

So you could simply set:

INITEE = 0x41; /*eeprom 0x4000 to 0x4FFF */

and keep INITRM and INITEE to reset/default value. About the fixed flash $4000-7FFF:

Simply overlapped by the block you move over. Indeed, eeprom or ram have a
bigger priority than flash on address bus.

First make sure it is used in your .prm file. Then:

One solution:

The debugger might use this fixed flash within the bank window, because
this fixed flash is also accessible in $8000-BFFF (bank window) when PPAGE
== 0x3E.

The .prm file of your project might have the following line in comments:

/* PAGE_3E = READ_ONLY 0x3E8000 TO 0x3EBFFF; not used: equivalent to
ROM_4000 */

Enable this line, and also add in "DEFAULT_ROM" placement the "PAGE_3E"
segment.

Note that no flash room is lost, but you have less unbanked flash for "non
banked" code like ISR's, etc.

Another solution:
-----------------
set

ROM_4000 = READ_ONLY 0x5000 TO 0x7FFF;

..but you loose 4 kBytes!

So for sure the linker will not try to overlap eeprom and flash code (won't
link anyway).

Regards,
Gilles At 02:30 PM 4/27/2005, you wrote:

>Thank you gilles for help
>
>On my DP256 i program it :
>
> INITRG = 0; /* lock registers block to 0x0000 */
> asm nop;
> INITRM = 0x40; /* RAM 0x4000 to 0x6FFF*/
> INITEE = 0x11; /*eeprom 0x1000 to 0x1FFF */
>
>Is it correct?
>
>In this case what is about the 16k fixed page at $4000 to $7FFF? I don't
>understand very well
>
>Thank you
>
>Regards
>
> ----- Original Message -----
> From: Gilles Blanquin
> To: 68HC12@68HC...
> Sent: Tuesday, April 26, 2005 9:30 AM
> Subject: Re: [68HC12] EEPROM and RAM memory map >
> Hi Pascal.
>
> Have a look in the "S12CPU15UG.pdf" manual, section "Module Mapping
> Control
> (MMC)".
>
> Overlap precedences:
>
> Highest
> -BDM (internal to Core) firmware or register space (hidden to user in
> general)
> -Internal register space
> -RAM memory block
> -EEPROM memory block
> -On-chip Flash EEPROM or ROM
> -Remaining external space
> Lowest
>
> However, block moving is more bound to block size, new address being a
> multiple of block size rounded to next power of two boundary, then aligned
> from bottom or top.
> Better to check in specs.
>
> Also some useful remapping compatible other several devices in:
>
> http://www.freescale.com/files/microcontrollers/doc/eng_bulletin/EB386.pdf
>
> EB386/D
> Rev. 3, 07/2002
> HCS12 D-family Compatibility Considerations
>
> Regards,
> Gilles > At 03:18 PM 4/25/2005, you wrote:
>
> >Hello,
> >
> >I would like to configure my 9s12dp256 to use register : 0-3FF, EEPROM
> >400-13FF, RAM 1400- 43FF
> >
> >Is it possible? If yes, i don't find the correct value of INITEE and
> INITRM
> >
> >An other question : if RAM is > at $4000 wich is a fixed flashed page,
> >what append?
> >
> >All of these adress questions are not clear for me....
> >
> >Thank you very much
> >
> >Regards
> >
> >
> >
> >
> >
> >
> >Yahoo! Groups Links
> >
> >
> >
> >
> >
>------
> Yahoo! Groups Links
>
> a.. To >Yahoo! Groups Links





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