Reg problem with Input capture interrupts

Dear all,

I am using HCS12X evaluation board.I wrote a simple code to
compute the wheel speed using the input capture timer. I have connected
the wheel speed outputs to the channels IOC0 - IOC3. Now the wheels are
moving at a constant pace.

The problem what I am facing is, as TIE(C0I) has higher
priority than the remaining three(C1I,C2I,C3I), channel 0 interrupt
continuosly occurs and doesn't allow the other interrupts to occur.

So can any one help me with this please.
Thanks & Regards,
Sara Start a New Thread

"saravanan" wrote:

>
> Dear all,
>
> I am using HCS12X evaluation board.I wrote a simple code to
> compute the wheel speed using the input capture timer. I have connected
> the wheel speed outputs to the channels IOC0 - IOC3. Now the wheels are
> moving at a constant pace.
>
> The problem what I am facing is, as TIE(C0I) has higher
> priority than the remaining three(C1I,C2I,C3I), channel 0 interrupt
> continuosly occurs and doesn't allow the other interrupts to occur.
>

Are you clearing interrupt flags properly? I hope you aren't doing it
something like this: TFLG1_C0F=1. It's obvious that TFLG1_C0F=1 can write
more ones to TFLG1 register than just to C0F. So it clears more TFLG1 flags
and you are loosing interrupts.

Edward
> So can any one help me with this please.
> Thanks & Regards,
> Sara
> Start a New Thread

--- In 6..., "Edward Karpicz" wrote:
Hi Edward & all,

No I'm clearing the flags at the beginning of the interrupt
itself. But still as all these are occuring at the same time CPU
gives priority to the Channel 0.
I have attached that portion of the code below. So wat can be the
solution for this.

interrupt void inputcapture1(void)
{
TFLG1_C0F = 1; // clear flag
PORTB_PB0 ^=1; // just for my reference
if ((edgecount1 ==0) && (timeof1stedgecounter1 ==0))
timeof1stedgecounter1 = TC0;

timeoflastedgecounter1 = TC0;

edgecount1 ++;

} Start a New Thread

--- In 6..., "Cady, Fred" wrote:

Hi Fred,
Thanks a lot. That has solved the problem.
Thank you friends for your help.

Regards,
Sara
>
> Hi,
> It looks to me like the problem is that your TFLG1_C0F = 1;
statement
> compiles to a bset _TFLG1,#1 instruction which won't work to reset
flags
> in the HC(S)12.
> The way the bset instruction works is that the register is first
read by
> the CPU, then the bit you want set is ORed and then the byte is
written
> back to the register. If any of the other flags are set they well be
> reset.
>
> The way to do it is to make sure your compiler generates a store
> instruction.
> Try this:
> TFLG1 = TFLG1_C0F_MASK;
>
> Here is how CodeWarrior compiles these instruction:
> 10: TFLG1_C0F = 1;
> 0002 4c0001 [4] BSET _TFLG1,#1
> 11: TFLG1 = TFLG1_C0F_MASK;
> 0005 c601 [1] LDAB #1
> 0007 5b00 [2] STAB _TFLG1
>
>
> Cheers,
>
>
>
> Fred Cady
> fcady@...
>
>
> ________________________________
>
> From: 6... [mailto:6...]
On
> Behalf Of saravanan
> Sent: Monday, February 11, 2008 8:39 PM
> To: 6...
> Subject: [68HC12] Re: Reg problem with Input capture
interrupts
>
>
>
> --- In 6...


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Start a New Thread

Hi,
It looks to me like the problem is that your TFLG1_C0F = 1; statement
compiles to a bset _TFLG1,#1 instruction which won't work to reset flags
in the HC(S)12.
The way the bset instruction works is that the register is first read by
the CPU, then the bit you want set is ORed and then the byte is written
back to the register. If any of the other flags are set they well be
reset.

The way to do it is to make sure your compiler generates a store
instruction.
Try this:
TFLG1 = TFLG1_C0F_MASK;

Here is how CodeWarrior compiles these instruction:
10: TFLG1_C0F = 1;
0002 4c0001 [4] BSET _TFLG1,#1
11: TFLG1 = TFLG1_C0F_MASK;
0005 c601 [1] LDAB #1
0007 5b00 [2] STAB _TFLG1

Cheers,

Fred Cady
f...@ieee.org

________________________________

From: 6... [mailto:6...] On
Behalf Of saravanan
Sent: Monday, February 11, 2008 8:39 PM
To: 6...
Subject: [68HC12] Re: Reg problem with Input capture interrupts

--- In 6...


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&&








Start a New Thread

Fred,

I just want to emphasize that BSET instruction isn't guilty. Also compiler
doesn't do anything wrong generating code with BSET. Less optimized compiler
could compile TFLG1_C0F = 1; to something like this:

ldaa TFLG1
oraa #1
staa TFLG1

No single bset, but code is still buggy and clears more flags than expected.
Registers like TFLG1 are not bitfields compatible and clearing flag this way
TFLG1_C0F = 1 - is a bug.

Edward

----- Original Message -----
From: "Cady, Fred"
To: <6...>
Sent: Tuesday, February 12, 2008 5:55 AM
Subject: RE: [68HC12] Re: Reg problem with Input capture interrupts
> Hi,
> It looks to me like the problem is that your TFLG1_C0F = 1; statement
> compiles to a bset _TFLG1,#1 instruction which won't work to reset flags
> in the HC(S)12.
> The way the bset instruction works is that the register is first read by
> the CPU, then the bit you want set is ORed and then the byte is written
> back to the register. If any of the other flags are set they well be
> reset.
>
> The way to do it is to make sure your compiler generates a store
> instruction.
> Try this:
> TFLG1 = TFLG1_C0F_MASK;
>
> Here is how CodeWarrior compiles these instruction:
> 10: TFLG1_C0F = 1;
> 0002 4c0001 [4] BSET _TFLG1,#1
> 11: TFLG1 = TFLG1_C0F_MASK;
> 0005 c601 [1] LDAB #1
> 0007 5b00 [2] STAB _TFLG1
> Cheers,
>
> Fred Cady
> f...@ieee.org
> ________________________________
>
> From: 6... [mailto:6...] On
> Behalf Of saravanan
> Sent: Monday, February 11, 2008 8:39 PM
> To: 6...
> Subject: [68HC12] Re: Reg problem with Input capture interrupts
>
> --- In 6...


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