EmbeddedRelated.com
Forums
The 2024 Embedded Online Conference

LM555 in Automotive application

Started by K.P.Venu December 14, 2002
Venu,

Yes, you might have a crystal problem.

Just to know for sure if this is the problem, you can connect 32khz oscillator
instead of the crystal and check if it solved the problem

Benny

---------- Forward Message ---------- Thanks Bob Smith and Kerry.
Kerry,
Recently I had a "slow clock" problem in my system.
When I discussed this with Motorola engineer, he said it may due to
crystal startup problem and suggested to check the LIMP-HOME flag
before writing to PLL registers. I have successfully implemented this
(thanks to Darci) and till date no problem has been reported from the
field.

But still I am not able to conclude that it is a crystal problem
because I am using an External Watchdog timer which has a Power-ON
reset delay of 600ms and timeout period of 150ms. I believe this
power-on delay is more than enough to start the oscillation.
I am using a voltage monitor too.(MC33164)

I have added two more things to check the slow clock,
1. External watchdog refreshment time modified to 100ms so that any
slow clock will delay the refresh time and initiate a reset.
2. Monitor Timer0 and MDC occurrence using RTI interrupt for a
predefined time (say 65.535ms).
Above methods are good for detecting slow clock but not smart enough
to detect a faster clock (due to wrong settings of PLL registers). So
I am planning to input a low frequency external reference signal for
counting the clock. This may not be a good idea but I need to do some
quick fix for this problem.

If anybody has any better idea please tell me.

Thanks and Best Regards,
Venu
--- In , "Kerry Berland" <kerry@s...> wrote:
> Since the 68HC12 has its own internal timebase,
> not sure the purpose of an external timer....??
>
> Unless maybe you're thinking of a kind of external
> watchdog timer? So that in the event of a hardware
> or software failure of the main MCU, the overall system
> would recover? If so, there are various reset generator
> chips that include external watchdog timers. Also there
> are power supply chips that include both a low voltage
> reset, and a watchdog timer.
>
> Best regards,
>
> Kerry Berland
> kerry@s...
> Silicon Engines
> 2101 Oxford Road
> Des Plaines, IL 60018 USA
> 847-803-6860
> Fax 847-803-6870
--------------------
">http://docs.yahoo.com/info/terms/
---------- End of Forward Message ----------






Hi,
You can use one of the PWM outputs to this job. Thanks and Best Regards ___________________________________________
Baskaran Kasimani Senior Engineer, Systems
Delphi Automotive Systems Singapore Pte Ltd
Delco Electronics Systems
Singapore Design Centre - Powertrain
501, Ang Mo Kio Industrial Park 1
Singapore 569621
Tel : (65) 6450 8652
Fax : (65) 6552 4459
email:


Benny,
Actually we planned to use 16Mhz oscillator for our h/w. For some
cost saving purpose we moved to 4Mhz crystal + PLL.

Venu

--- In , RTS development - Benny Rabin
<benny@r...> wrote:
> Venu,
>
> Yes, you might have a crystal problem.
>
> Just to know for sure if this is the problem, you can connect 32khz
oscillator
> instead of the crystal and check if it solved the problem
>
> Benny
>
> ---------- Forward Message ---------- > Thanks Bob Smith and Kerry.
> Kerry,
> Recently I had a "slow clock" problem in my system.
> When I discussed this with Motorola engineer, he said it may due to
> crystal startup problem and suggested to check the LIMP-HOME flag
> before writing to PLL registers. I have successfully implemented
this
> (thanks to Darci) and till date no problem has been reported from
the
> field.
>
> But still I am not able to conclude that it is a crystal problem
> because I am using an External Watchdog timer which has a Power-ON
> reset delay of 600ms and timeout period of 150ms. I believe this
> power-on delay is more than enough to start the oscillation.
> I am using a voltage monitor too.(MC33164)
>
> I have added two more things to check the slow clock,
> 1. External watchdog refreshment time modified to 100ms so that any
> slow clock will delay the refresh time and initiate a reset.
> 2. Monitor Timer0 and MDC occurrence using RTI interrupt for a
> predefined time (say 65.535ms).
> Above methods are good for detecting slow clock but not smart
enough
> to detect a faster clock (due to wrong settings of PLL registers).
So
> I am planning to input a low frequency external reference signal
for
> counting the clock. This may not be a good idea but I need to do
some
> quick fix for this problem.
>
> If anybody has any better idea please tell me.
>
> Thanks and Best Regards,
> Venu
> --- In , "Kerry Berland" <kerry@s...> wrote:
> > Since the 68HC12 has its own internal timebase,
> > not sure the purpose of an external timer....??
> >
> > Unless maybe you're thinking of a kind of external
> > watchdog timer? So that in the event of a hardware
> > or software failure of the main MCU, the overall system
> > would recover? If so, there are various reset generator
> > chips that include external watchdog timers. Also there
> > are power supply chips that include both a low voltage
> > reset, and a watchdog timer.
> >
> > Best regards,
> >
> > Kerry Berland
> > kerry@s...
> > Silicon Engines
> > 2101 Oxford Road
> > Des Plaines, IL 60018 USA
> > 847-803-6860
> > Fax 847-803-6870
>





The 2024 Embedded Online Conference