S12DP256 and the ECT

Started by jb_tempe_jb January 30, 2004
Hi,

I'm attempting to write some code to use the modulus down counter for
the DP256. No interrupts, simple gadfly loops looking for the
underflow flag.

Oh, yeah, I'm using code warrior 3 and writing the program in C.

My problem is that I can't write anything to the MCCNT register... the
ECT datasheet says, and I quote, "Read or write any time."

When I step through my code using the in-circuit debugger, the
register stays at its reset value of 0xFFFF.

Does anyone know if this is just a debugger problem? Or will I have
the problem in real-time? I don't have all the hardware I'm going to
need to test this yet, so I thought I'd ask you guys.

TIA,
jb



---- Original Message -----
From: "jb_tempe_jb" <>

> My problem is that I can't write anything to the MCCNT register... the
> ECT datasheet says, and I quote, "Read or write any time."

Enable it first, then write to MCCNT

Edward




--- Edward Karpicz <> wrote:
> ---- Original Message -----
> From: "jb_tempe_jb" <>
>
> > My problem is that I can't write anything to the
> MCCNT register... the
> > ECT datasheet says, and I quote, "Read or write
> any time."
>
> Enable it first, then write to MCCNT
>
> Edward
No, really, it isn't updating when it should. Tried
it in the FCS full-chip simulator with modulus counter
enabled and disabled, even though the spec says it
should work either way.

Not a big deal, I'll get it working one way or another.

__________________________________



> > > My problem is that I can't write anything to the
> > MCCNT register... the
> > > ECT datasheet says, and I quote, "Read or write
> > any time."
> >
> > Enable it first, then write to MCCNT
> >
> > Edward
> >
> >
> No, really, it isn't updating when it should. Tried
> it in the FCS full-chip simulator with modulus counter

1. "When MCEN=0, the counter is preset to $FFFF. This will
prevent an early interrupt flag when the modulus
down-counter is enabled."
So MCEN has to be set.
2. "RDMCL- Read Modulus Down-Counter Load
0 = Reads of the modulus count register will return
the present value of the count register.
1 = Reads of the modulus count register will return
the contents of the load register."

When MCEN ==0 both MC counter and MC load register are
fixed at FFFF,
load register is read only. Just try it. Setup RDMCL bit
(=1) for reads of load register.
Write any non FFFF value to MCCNT. Now enable MCEN -
MCCNT=FF.
Write again non FFFF to MCCNT and read it back.

Edward

> enabled and disabled, even though the spec says it
> should work either way.
>
> Not a big deal, I'll get it working one way or another.
>
> __________________________________
>
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