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Memfault Beyond the Launch

SPI SPIF not getting set (MC9S12DP256C)

Started by Graham Tricker May 17, 2004
Hi

I am using an SPI port in master mode and have the following routine to
transmit/receive bytes from the slave.

far byte spi_RFTxRx (byte tda, byte *rda)

/* spi_RFTxRx:
**
** Graham, Issue 1.0, 15 Dec 2003
**
** Transmits and receives data from RF Module
*/

{

while (!(SPI1SR & SPTEF)); // No room in
transmit buffer;
SPI1DR = tda; // Send data

while (!(SPI1SR & SPIF)); // Rx not yet
complete
*rda = SPI1DR; // Get data

return (OK);

}

This routine has worked fine for months, I have just added some
functionality that checks the status of the slave device during POR. The
routine above gets called from a higher level routine which works fine in
every other circumstance. The problem I have is, the function is called 4
times fine then the 5th time the SPIF flag never gets set to 1 and my
routine hangs intermittently, say 1 out of 5 POR's.

I have checked my signals and I get all eight clock pulses as expected but
no SPIF flag on completion. I have checked the errata for the chip I am
using but have found nothing indicating such a problem.

Any help would be greatly appreciated.

Cheers

Graham **********************************************************************
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I was having endless amounts of random problems with my SPI routines
a few months ago(on a MC9S12DJ128B). I finally got a hold of the
right person at motorola and he gave me this suggestion:

SPI1CR1_SPE = 1; //enable SPI
__asm NOP;
__asm NOP;
__asm NOP;
test=SPI1SR;
test=SPI1DR;

The NOPs are there because he said he *always* puts them their and
never has had a problem. I'm willing to gamble 3 cycles on
that :^) He also reads both the SR and DR to ensure flags get
cleared. As soon as I did this, the random problems I was having
disappeared.

Another idea if you don't want to risk a lock up(and aren't using
the COP) would be to stick a counter in the while() test. Of course,
if your slave device not working causes death and destruction, it
might not be a good idea!

I just defined a var int count= 0xFFFF; then made my loop as follows:

while( !SPI1SR_SPTEF && count)
{
__asm NOP; //WAIT for the transmitter empty flag
count--;
}

The NOP's optional, but it does give me more clock cycles to wait
before I just give up on the transfer. --- In , Graham Tricker <Graham.Tricker@F...>
wrote:
> Hi
>
> I am using an SPI port in master mode and have the following
routine to
> transmit/receive bytes from the slave.
>
> far byte spi_RFTxRx (byte tda, byte *rda)
>
> /* spi_RFTxRx:
> **
> ** Graham, Issue 1.0, 15 Dec 2003
> **
> ** Transmits and receives data from RF Module
> */
>
> {
>
> while (!(SPI1SR & SPTEF)); // No room in
> transmit buffer;
> SPI1DR = tda; // Send data
>
> while (!(SPI1SR & SPIF)); // Rx not yet
> complete
> *rda = SPI1DR; // Get data
>
> return (OK);
>
> }
>
> This routine has worked fine for months, I have just added some
> functionality that checks the status of the slave device during
POR. The
> routine above gets called from a higher level routine which works
fine in
> every other circumstance. The problem I have is, the function is
called 4
> times fine then the 5th time the SPIF flag never gets set to 1 and
my
> routine hangs intermittently, say 1 out of 5 POR's.
>
> I have checked my signals and I get all eight clock pulses as
expected but
> no SPIF flag on completion. I have checked the errata for the
chip I am
> using but have found nothing indicating such a problem.
>
> Any help would be greatly appreciated.
>
> Cheers
>
> Graham >
*********************************************************************
*
> This message contains confidential information and is intended
only for the individual named. If you are not the named addressee
you should not disseminate, distribute or copy this e-mail. Please
notify the sender immediately by e-mail if you have received this e-
mail by mistake and delete this e-mail from your system.
> Although BERU F1 SYSTEMS believe this e-mail and any attachments
are free of any virus or other defect which may affect a computer,
it is the responsibility of the recipient to ensure that it is virus
free and BERU F1 SYSTEMS do not accept any responsibility for any
loss or damage arising in any way from its use.
> This footnote confirms that this email message has been swept by
MAIL Sweeper.
>
*********************************************************************
*



Memfault Beyond the Launch