EmbeddedRelated.com
Forums
Memfault State of IoT Report

IIC bus locks

Started by Jordi Costa October 28, 2004
At 2005-02-09 00:46, Flavio Protasio Ribeiro wrote:
>By "powered down" I meant "turned off", so I'm pretty sure it won't
>pull the lines low enough :)

Perhaps you should redefine your problem, because
it doesn't seem to make much sense the way you
stated it.

Greetings,
Jaap



Jordi,

Freescale informed me that the I2C modules on the HC12 and HCS12 in
fact don't support any bus reset procedure. To recover the I2C bus one
must disable the I2C module and bit bang the reset procedure I
mentioned earlier.

However, this procedure isn't guaranteed to work on all I2C state
machines. This is because Philips' I2C spec isn't precise on how a
slave must proceed after receiving a NACK. It just says the slave must
release the bus lines and expect a STOP. Since the procedure sends 9
SCL pulses (which is the minimum number of cycles to ensure that the
slave will interpret one of the bits as a NACK), it will typically
send extra SCL pulses. From the slave's point of view, SCL will
continue to be cycled after the NACK. This may put the slave's state
machine on an undefined state.

Since Philips themselves specify this procedure on several of their
datasheets, it seems like their own devices simply ignore SCL pulses
following a NACK up until a STOP.

Of all the references I've seen on this issue, I believe the best is
Analog Devices' AN-686.

Best regards,

Flavio --- In , "Jordi Costa" <bvjordi@b...> wrote:
> Flavio,
>
> I never fixed the problem but situation seems not to arise
> under normal use and proper circuit board. Problem was really
> detected when prototyping with some wiring attached on board.
>
> Anyway I'm still interested in a good fix to prevent it. My
> intention was to force the state and try some bit banging as
> yours to release the bus, but other tasks kept me away from
> this matter.
>
> Please keep us informed of any progress.
>
> Jordi Costa




Memfault State of IoT Report