Hi,
I want to use the #PRAGMA CODE_SECTION directive, but the Compiler (CCS 3.1.0)
gives the error: error: badly formed pragma.
I have tried all things but none seems to work... where is the error?
Thanks
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
The File where the related functions are used is:
#include "DSP_ClkSystem.h"
#include "DSP280x_Device.h"
#include
//*************************************************************************//
Initialices the Flash Registers
// This function is executed out of RAM
//.........................................................................
// Input:
// none
//
// Return:
// none
//
// Interrupts: non modified
#pragma CODE_SECTION(FlashConfigInRAM, "ramfuncs")
void FlashConfigInRAM(void)
{
EALLOW;
//Enable Flash Pipeline
FlashRegs.FBANKWAIT.bit.PAGEWAIT=3;
FlashRegs.FBANKWAIT.bit.RANDWAIT=3;
FlashRegs.FOTPWAIT.bit.OTPWAIT=5;
FlashRegs.FOPT.bit.ENPIPE = 1;
EDIS;
asm(" RPT #8 || NOP"); // Pipeline Flush
}
extern unsigned int RamfuncsLoadStart;
extern unsigned int RamfuncsLoadEnd;
extern unsigned int RamfuncsRunStart;
//*************************************************************************
// Copies the function FlashConfigInRAM() to RAM and executes it
//.........................................................................
// Input:
// none
//
// Return:
// none
//
// Interrupts: non modified
void Init_Flash(void)
{
// Configurate the Flash Registers
memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (&RamfuncsLoadEnd -
&RamfuncsLoadStart));
FlashConfigInRAM();
}
//*************************************************************************
// Initialices the Internal Clock
//.........................................................................
// Input:
// none
//
// Return:
// none
//
// Interrupts: non modified
void Init_DSP_Clk(void)
{
EALLOW;
SysCtrlRegs.PLLCR.bit.DIV; // SYSCLOCK = 100Mhz
SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
SysCtrlRegs.WDCR= 0x0068; // disable watchdog
SysCtrlRegs.LOSPCP.all = 0x0000; // LSPCLK = SYSCLKOUT/1 = 100 Mhz/1 =
100 Mhz
SysCtrlRegs.XCLK.bit.XCLKOUTDIV=2;
EDIS;
// Wait untill PLL is locked
while(SysCtrlRegs.PLLSTS.bit.PLLLOCKS == 0)
{
asm(" RPT #6 || NOP");
}
DSP_Clk_PWM();
// Configurate the Flash Registers
Init_Flash();
}
.................. etc
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
The Include is:
void Init_DSP_Clk(void);
void DSP_Clk_PWM(void);
void DSP_OSCCLK_x10_divided_by_2(void);
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
The CMD is:
MEMORY
{
PAGE 0: /* Program Memory */
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data
allocation */
RAML0 : origin = 0x008000, length = 0x001000 /* on-chip RAM block
L0 */
OTP : origin = 0x3D7800, length = 0x000400 /* on-chip OTP */
FLASHD : origin = 0x3E8000, length = 0x004000 /* on-chip FLASH */
FLASHC : origin = 0x3EC000, length = 0x004000 /* on-chip FLASH */
FLASHA : origin = 0x3F4000, length = 0x003F80 /* on-chip FLASH */
CSM_RSVD : origin = 0x3F7F80, length = 0x000076 /* Part of FLASHA.
Program with all 0x0000 when CSM is in use. */
BEGIN : origin = 0x3F7FF6, length = 0x000002 /* Part of FLASHA.
Used for "boot to Flash" bootloader mode. */
CSM_PWL : origin = 0x3F7FF8, length = 0x000008 /* Part of FLASHA.
CSM password locations in FLASHA */
ROM : origin = 0x3FF000, length = 0x000FC0 /* Boot ROM */
RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM
*/
VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM
*/
PAGE 1 : /* Data Memory */
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program
allocation */
/* Registers remain on PAGE1
*/
RAMM0 : origin = 0x000000, length = 0x000400 /* on-chip RAM block
M0 */
RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block
M1 */
RAML1 : origin = 0x009000, length = 0x001000 /* on-chip RAM block
L1 */
RAMH0 : origin = 0x3FA000, length = 0x002000 /* on-chip RAM block
H0 */
FLASHB : origin = 0x3F0000, length = 0x004000 /* on-chip FLASH */
}
/* Allocate sections to memory blocks.
Note:
codestart user defined section in DSP28_CodeStartBranch.asm used to
redirect code
execution when booting to flash
ramfuncs user defined section to store functions that will be copied
from Flash into RAM
*/
SECTIONS
{
/* Allocate program areas: */
.cinit : > FLASHA PAGE = 0
.pinit : > FLASHA, PAGE = 0
.text : > FLASHA PAGE = 0
codestart : > BEGIN PAGE = 0
ramfuncs : LOAD = FLASHD,
RUN = RAML0,
LOAD_START(_RamfuncsLoadStart),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
PAGE = 0
csmpasswds : > CSM_PWL PAGE = 0
csm_rsvd : > CSM_RSVD PAGE = 0
/* Allocate uninitalized data sections: */
.stack : > RAMM0 PAGE = 1
.ebss : > RAML1 PAGE = 1
.esysmem : > RAMH0 PAGE = 1
/* Initalized sections go in Flash */
/* For SDFlash to program these, they must be allocated to page 0 */
.econst : > FLASHA PAGE = 0
.switch : > FLASHA PAGE = 0
/* Allocate IQ math areas: */
IQmath : > FLASHC PAGE = 0 /* Math Code
*/
IQmathTables : > ROM PAGE = 0, TYPE = NOLOAD /* Math Tables
In ROM */
/* .reset is a standard section used by the compiler. It contains the */
/* the address of the start of _c_int00 for C Code. /*
/* When using the boot ROM this section and the CPU vector */
/* table is not needed. Thus the default type is set here to */
/* DSECT */
.reset : > RESET, PAGE = 0, TYPE = DSECT
vectors : > VECTORS PAGE = 0, TYPE = DSECT
}
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
Thanks !!!!!!!
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