SCI as UART and FIFO on TMS320F2812

I'm trying to use SCI port on TMS320F2812 as UART with FIFO enabled.
The idea of having FIFO is to reduce the interrupt burden for every
character.
If received characters are less than FIFO size and receive line is idle
for a long time then those characters are stuck in FIFO. Processor
won't get interrupt for those characters until FIFO gets full.
>From my experience with different UART chips, receive interrupt comes
either when FIFO is full or there is 3-4 character length timeout(idle)
on RX line.
I'll give you a simple example, if i'm using the UART for connecting to
hyperterminal assume user hit the 'Enter' key, so i'll not get the
enter key until user hits FIFO size of keys.
In other example, if processor sends out a packet and waiting for ACK
packet which is of size less than FIFO, then communication is stuck
there.
To avoid these, UARTs provide a time-out on receive FIFO.

So I'm not sure whether I'm doing something wrong in the configuration
or that feature is not there at all in TMS320F2812 DSP.
Appricaite any repplies.

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just for your information, as it will not directly reply to your question.

In my project, i'm using serial port with FIFO enabled and no interrupts.

So, in my operating system, the serial communication is a background task,
sending and receiving chars at no cost.
Chars lost are at this time avoided due to the verification of the FIFO
status before sending a new one.

Envoypar : c...
Pour : c...
cc :

Objet : [c28x] SCI as UART and FIFO on TMS320F2812

I'm trying to use SCI port on TMS320F2812 as UART with FIFO enabled.
The idea of having FIFO is to reduce the interrupt burden for every
character.
If received characters are less than FIFO size and receive line is idle
for a long time then those characters are stuck in FIFO. Processor
won't get interrupt for those characters until FIFO gets full.
>From my experience with different UART chips, receive interrupt comes
either when FIFO is full or there is 3-4 character length timeout(idle)
on RX line.
I'll give you a simple example, if i'm using the UART for connecting to
hyperterminal assume user hit the 'Enter' key, so i'll not get the
enter key until user hits FIFO size of keys.
In other example, if processor sends out a packet and waiting for ACK
packet which is of size less than FIFO, then communication is stuck
there.
To avoid these, UARTs provide a time-out on receive FIFO.

So I'm not sure whether I'm doing something wrong in the configuration
or that feature is not there at all in TMS320F2812 DSP.
Appricaite any repplies.

OMAP35x EVM jump-starts low-power apps
The modular and extensible OMAP35x Evaluation Module (EVM) enables developers to start building applications based on the OMAP35x architecture: http://www.DSPRelated.com/omap35x Start a New Thread

Thank you Alain,
Most of the UARTs with FIFO have the feature to generate interrupt on
timeout on recieve line with few chars stuck in FIFO. This would ease
the interrupt based operation.
To use with BIOS, i have no option but set FIFO size as 1 or creat
periodic task to check the FIFO.
--- In c..., Alain SALMETOZ
wrote:
>
> just for your information, as it will not directly reply to your
question.
>
> In my project, i'm using serial port with FIFO enabled and no
interrupts.
>
> So, in my operating system, the serial communication is a
background task,
> sending and receiving chars at no cost.
> Chars lost are at this time avoided due to the verification of the
FIFO
> status before sending a new one.
>
>
>
>
>
>
>
> Envoypar : c...
> Pour : c...
> cc :
>
> Objet : [c28x] SCI as UART and FIFO on TMS320F2812
>
> I'm trying to use SCI port on TMS320F2812 as UART with FIFO enabled.
> The idea of having FIFO is to reduce the interrupt burden for every
> character.
> If received characters are less than FIFO size and receive line is
idle
> for a long time then those characters are stuck in FIFO. Processor
> won't get interrupt for those characters until FIFO gets full.
> From my experience with different UART chips, receive interrupt
comes
> either when FIFO is full or there is 3-4 character length timeout
(idle)
> on RX line.
> I'll give you a simple example, if i'm using the UART for
connecting to
> hyperterminal assume user hit the 'Enter' key, so i'll not get the
> enter key until user hits FIFO size of keys.
> In other example, if processor sends out a packet and waiting for
ACK
> packet which is of size less than FIFO, then communication is stuck
> there.
> To avoid these, UARTs provide a time-out on receive FIFO.
>
> So I'm not sure whether I'm doing something wrong in the
configuration
> or that feature is not there at all in TMS320F2812 DSP.
> Appricaite any repplies.
>


OMAP35x EVM jump-starts low-power apps
The modular and extensible OMAP35x Evaluation Module (EVM) enables developers to start building applications based on the OMAP35x architecture: http://www.DSPRelated.com/omap35x Start a New Thread