valwn@silvtrc.org wrote:> How is core-2-core communication?, complicated?, cpu intensive? trivial?Actually there is no "core-2-core" communications. Each core or cog is absolutely identical and they share the same I/O pins as well but they are all connected to a HUB-like RAM with a simple "rotary commutator" or "Propeller" scheme which guarantees equal access. So then there is this core-to-hub communication using reads and writes between the COG and common HUB RAM. It's a bit like having an 8-port RAM with 8 independent CPUs connected to it and with each CPU having 32 I/O ports all "wired OR" together to 32 I/O pins. Simple and surprisingly very effective. Note that there is a Prop II being designed that runs a lot faster, has more memory, I/O etc and may have other enhancements as well. But for now I know I can use this simple little Prop to do complicated tasks simply and cheaply. *Peter*
Simple & small MCU with 4 UARTS
Started by ●December 31, 2008
Reply by ●December 31, 20082008-12-31
Reply by ●January 1, 20092009-01-01
On Dec 31 2008, 7:53=A0am, eliben <eli...@gmail.com> wrote:> > I need an MCU with 4 UART (@ 38.4 KBaud each) and several IOs. The 4 > > UARTs is a problem, because the simplest MCUs (PIC, AVR) don't have > > chips with this amount (AFAIK). > > Sorry about the self reply, but I've just found that AVR have the > 640/1280/2560 families, which seem to have 4 UARTs. Does anyone have > experience using these chips ?Hi , I have used ATMEGA 2560 for one of our products ( 4 way UART switch/ Pipe). We operate it at 8 Mhz and can do 38400 easily on all ports. We didnt have any problems so far. More over the software tools are free i.e. WinAVR gcc + AvrStudio ( with winavr gcc as a plug in). ISP programmer(=A320) and USB JTAG Debugger(=A3200) are cheap as well comparatively. Also there are open source libraries on the net that can get you started in a giffy!. e.g. http://www.mil.ufl.edu/~chrisarnold/components/microcontrollerBoard/A= VR/avrlib/ Hope this helps. Happy new year. Rate
Reply by ●January 1, 20092009-01-01
On Jan 1, 3:12=A0pm, ratemonotonic <niladri1...@gmail.com> wrote:> On Dec 31 2008, 7:53=A0am, eliben <eli...@gmail.com> wrote: > > > > I need an MCU with 4 UART (@ 38.4 KBaud each) and several IOs. The 4 > > > UARTs is a problem, because the simplest MCUs (PIC, AVR) don't have > > > chips with this amount (AFAIK). > > > Sorry about the self reply, but I've just found that AVR have the > > 640/1280/2560 families, which seem to have 4 UARTs. Does anyone have > > experience using these chips ? > > Hi , > > I have used ATMEGA 2560 for one of our products ( 4 way UART switch/ > Pipe). We operate it at 8 Mhz and can do 38400 easily on all ports. > We didnt have any problems so far. More over the software tools are > free i.e. WinAVR gcc + AvrStudio ( with winavr gcc as a plug in). ISP > programmer(=A320) and USB JTAG Debugger(=A3200) are cheap as well > comparatively. > > Also there are open source libraries on the net that can get you > started in a giffy!. > > e.g. =A0http://www.mil.ufl.edu/~chrisarnold/components/microcontrollerBoa=rd/A...> > Hope this helps. Happy new year.Yes, it does! Thanks for letting me know about the chip. Eli
Reply by ●January 2, 20092009-01-02
On Dec 31 2008, 4:32=A0pm, Peter Jakacki <peterjaka...@gmail.com> wrote:> I'm just talking about a standard 5 button PS/2 mouse with CLK and DAT.With 32 I/O pins it sounds like it could easily use a cog to manage a mouse wheel and buttons directly inside the mouse instead of the 6805 or whatever is in there and have it update buffers and variables in the common HUB RAM just like the one currently doing the standard mouse interface protocol. Was that a spin programming language example? It looks pretty simple. Best Wishes
Reply by ●January 2, 20092009-01-02
On Dec 31 2008, 8:23=A0am, Vladimir Vassilevsky <antispam_bo...@hotmail.com> wrote:> 5) Fast AVR should be able to handle 4 independent UARTs at 38400 as the > software bit banging.What do you think is the upper baud limit for 1 to 4 software bit banging UART on a fast AVR before a hardware UART is needed? What are the upper limits using the hardware UART on a fast AVR? Best Wishes
Reply by ●January 2, 20092009-01-02
Jeff Fox wrote:> On Dec 31 2008, 8:23 am, Vladimir Vassilevsky > <antispam_bo...@hotmail.com> wrote: >> 5) Fast AVR should be able to handle 4 independent UARTs at 38400 as the >> software bit banging. > > What do you think is the upper baud limit for 1 to 4 software bit > banging > UART on a fast AVR before a hardware UART is needed? >That's very much a "it depends" question. It depends on things like whether the UARTs are duplex (sending is much easier than receiving), whether they are all active at the same time, whether they are synchronized, how accurate the baud rates are known, what the noise environment is like (that affects the need for oversampling), whether you need to write it all in C or if you can use assembly (this is one of the cases where hand-crafted assembly can be *much* faster), and what else the processor is doing. I wrote a 38.4 kbaud software UART on an AVR at 7.37 MHz with 4 times oversampling. That meant a timer running at 153.6 kHz, with 48 processor clocks between ticks. That's not a lot of time, but easily enough for the software UART written in assembly.> What are the upper limits using the hardware UART on a fast AVR? > > Best Wishes
Reply by ●January 2, 20092009-01-02
On Jan 2, 10:23=A0pm, David Brown <david.br...@hesbynett.removethisbit.no> wrote:> Jeff Fox wrote: > > On Dec 31 2008, 8:23 am, Vladimir Vassilevsky > > <antispam_bo...@hotmail.com> wrote: > >> 5) Fast AVR should be able to handle 4 independent UARTs at 38400 as t=he> >> software bit banging. > > > What do you think is the upper baud limit for 1 to 4 software bit > > banging > > UART on a fast AVR before a hardware UART is needed? ><snip>> I wrote a 38.4 kbaud software UART on an AVR at 7.37 MHz with 4 times > oversampling. =A0That meant a timer running at 153.6 kHz, with 48 > processor clocks between ticks. =A0That's not a lot of time, but easily > enough for the software UART written in assembly.3 times oversampling actually gives better results than 4 times. I know it seems wierd, but it actually gives sampling that is closer to the bit center than 4 times oversampling. It also has less processor overhead and works fine with a 7372800 Hz clock.
Reply by ●January 2, 20092009-01-02
>1) Use a different MCU (Renesas, Freescale), etc. I'm reluctant to do >it, because I'm familiar with AVR and PIC and they're very simple to >program. Ideally, the programming for this application should take a >few days, and I wouldn't want to learn a new MCU/compiler/toolchain. >I appreciate that you don't want to learn a new micro, but for what it is worth, the PSoC CY8C29xxx series can be configured with 4 UARTs. The PSoC comes with configurable digital and analog blocks that can be set up in a multitude of ways within the constraints of the resources. Also possible with the PSoC or with external gating on another processor is to have one UART communicating over multiplexed pins provided only one channel is operating at any given time. -Aubrey
Reply by ●January 2, 20092009-01-02
Jeff Fox wrote:> On Dec 31 2008, 8:23 am, Vladimir Vassilevsky > <antispam_bo...@hotmail.com> wrote: > >>5) Fast AVR should be able to handle 4 independent UARTs at 38400 as the >>software bit banging. > > > What do you think is the upper baud limit for 1 to 4 software bit > banging UART on a fast AVR before a hardware UART is needed?That mainly depends on the interrupt latency. With no other interrupts, the transmit part is no problem up to hundreds of kbps. Receive part is more difficult. For one software UART, the interrupt by the start bit can be used, which allows the speed of hundreds kbps also. For many uarts, the sampling of at least two times per bit is required. That sets the upper limit at about 100kbps.> What are the upper limits using the hardware UART on a fast AVR?The max. speed of the AVR hardware UART is CLK/8, i.e. 2.5Mbaud at 20MHz. I have actually used the AVR UART at 2.048M; it works as expected. Vladimir Vassilevsky DSP and Mixed Signal Design Consultant http://www.abvolt.com
Reply by ●January 3, 20092009-01-03
Perhaps the "Propellor" thing deserves it's own thread. I've looked into this "propellpr" thing a little bit, as someone brought small "propellor" protoboard to a recent robot club meeting (I forget if it was the plugin breadboard or the DIP board had a small USB connector on it) and a 9V battery for power. The statement "it has eight 32-bit cores" got my attention. Maybe you can give quick answers to my questions below before I dive deeply into the documentation. On Thu, 01 Jan 2009 01:13:34 GMT, Peter Jakacki <peterjakacki@gmail.com> wrote:>valwn@silvtrc.org wrote: >> How is core-2-core communication?, complicated?, cpu intensive? trivial? > >Actually there is no "core-2-core" communications. Each core or cog is >absolutely identical and they share the same I/O pins as well but they >are all connected to a HUB-like RAM with a simple "rotary commutator" or >"Propeller" scheme which guarantees equal access.Bow many bytes is this shared RAM? Can one processor generate an interrupt on another one (without using up one of the common I/O pins)? How much ram and program memory does each core have? Wait, I found it here: http://www.parallax.com/tabid/407/Default.aspx Global RAM/ROM 64 K bytes; 32K RAM / 32 K ROM So I guess that's shared among the 8 processors. Processor RAM 2 K bytes each Is each core the "standard" Von Neumann architecture (program and data inabit different areas of the same address space), or is it Harvard (program and data are on separate busses and thus can be accessed simultaneously for greater speed, like DSP's, the AVR and several other microcontrollers)? What's the programming language? Is there an assembler? What's the architecture of each core (or "cog") look like (number of registers, how they can be used in different instructions and addressing modes, approximate average cycles per instruction, etc.)? Is there a C compiler for it? Might there be a GCC port for it? (others might want to ask about C++, but for me it's a little hard to imagine using C++ for a microcontroller). I did read some blurb on the Parallax site by the designer, that it is what it is, that he hand-designed the thing rather than using the usual hardware-design tools and HDL's, and there won't be a bunch of slightly different verssions with different peripherals and such. Here it is: http://www.parallax.com/Portals/0/Downloads/docs/article/WhythePropellerWorks.pdf> >So then there is this core-to-hub communication using reads and writes >between the COG and common HUB RAM. It's a bit like having an 8-port RAM >with 8 independent CPUs connected to it and with each CPU having 32 I/O >ports all "wired OR" together to 32 I/O pins. > >Simple and surprisingly very effective. Note that there is a Prop II >being designed that runs a lot faster,The above page says this thing runs up to 80MHz, that's not too shabby, depending on what you're comparing it to. How much faster is "a lot?" ;)>has more memory, I/O etc and may >have other enhancements as well. But for now I know I can use this >simple little Prop to do complicated tasks simply and cheaply. > >*Peter* >
