"Paul Keinanen" <keinanen@sci.fi> wrote in message news:57k7p456imr6midej88n475g62t4lc6fjn@4ax.com...> On Wed, 11 Feb 2009 22:46:34 -0800 (PST), rickman <gnuarm@gmail.com> > wrote: > > An other method is to operate the RS-485 bus as a CAN bus i.e. with > dominant and recessive states, which does not require active data > direction control. > > The RS-232 TD pin on the RS-232/485 converter is permanently connected > to the "0" state and the TxEnable pin is connected to the UART TX pin > so that when "0" bit needs to be transmitted, the transceiver chip is > enabled and the bus is driven actively to the "0" dominant state. When > the "1" bit needs to be transmitted, the transmitter is disabled and > the "fail-safe" bus termination will pull the bus to the "1" idle > (recessive) state. This may have some implications for the noise > margin.Good advice *so long* as failsafe (biased) termination is used. It's not that common, but should be, and is (at last) cropping up as standard on some converters, interfaces and transceivers. And that's assuming the A/B confusion issue doesn't result in so-called failsafe biasing resulting in the exact opposite, i.e. a BREAK condition i.e. continuous receive interrupts on every station. Seen *that* a couple of times... grrrr... Steve -- http://www.fivetrees.com
2 wire rs485
Started by ●February 10, 2009
Reply by ●February 12, 20092009-02-12
Reply by ●February 12, 20092009-02-12
"Vasilis" <VASILI3000@HOTMAIL.COM> wrote in message news:ae766683-c87e-453c-93da-1e2f1290eb6c@v19g2000yqn.googlegroups.com...>>ok, i'll try to be as precise as possible, but bear in mind i am a sw engineer, i don't have much of an electronics knowledge. when i use the converter (which by the way is a JaRa 2102E(chinese)) i do this: - plug the converter to the serial port RS232 - screw one end of each of two wires into, respectively, a hole marked d+/A and a hole d-/B on the converter side - screw the other end of the wires to the holes of the meter i mentioned before.(A and B) the total length of the cable is approx 60cm. the software i wrote does this: - set the port parameters as needed to communicate with the meter(1200 baud, even parity, 8 data bits, 1 stop bit) - send 16 bytes(a packet of the meter communication protocol with a request enclosed) - receive 20 bytes (the response packet) no rts cts lowering or raising. no ground wire, even though there is a hole on the converter end marked as GND.(as i mentioned before, the meter doesn't have one) i googled for the converter model but i found no electrical scheme, just a few pages in chinese. also, about waiting for the clear to send signal, well, it is never sent by the meter. << Ok - firstly, at 1200 baud and 60cm, you don't have to worry too much about termination. (Biasing is another issue, but ignore that for now.) Second, don't worry about "clear to send". This was mentioned only in the context of enabling the transmitter. (As others have said, only one device at a time can transmit on a 2-wire RS-485 bus.) In the case of your converter, it presumably is controlling its own transmitter automatically. If you're not controlling your transmitter, then it must be doing it. If nothing was controlling it, you'd see no response. So: everything works when you use the external converter, but not when you use a bare RS-485 interface. I'd suggest the missing ingredient is the transmit control system in the converter. If you actively control the transmitter on your bare interface, which means going tristate when you're not actively transmitting, then it'll work. Steve -- http://www.fivetrees.com
Reply by ●February 12, 20092009-02-12
On 2009-02-12, Steve at fivetrees <steve@NOSPAMTAfivetrees.com> wrote:> "Grant Edwards" <grante@visi.com> wrote in message > news:J9CdnVS6Y-YV3AnUnZ2dnUVZ_h4AAAAA@posted.visi... >> >>> On ordinary PC style 14550 series UARTS it is hard to detect >>> when the last stop bit has been transmitted, either poll the >>> proper UART status bit >> >> I've seen chipsets where that bit wasn't implimented correctly >> and went active before the last stop bit was sent. > > The "transmit buffer empty" flag just says the data has been > loaded into the Tx shift register, and hence the transmit > buffer is ready to receive more data. It doesn't tell you > anything about the Tx shift register, which typically > (unsurprisingly) takes one more frame time to send that last > stop bit.I was talking about "shift-register empty" bits that went true before the stop bit had been sent.> So: use the flag to start a timer for e.g. 1.5 chr times, *then* disabled > the transmitter. Or, as Paul says, monitor your own transmissions (closely: > doing so periodically is nowhere near good enough).-- Grant
Reply by ●February 12, 20092009-02-12
"Grant Edwards" <grante@visi.com> wrote in message news:N_CdnfYadOH1AgnUnZ2dnUVZ_sjinZ2d@posted.usinternet...> On 2009-02-12, Steve at fivetrees <steve@NOSPAMTAfivetrees.com> wrote: >> >> The "transmit buffer empty" flag just says the data has been >> loaded into the Tx shift register, and hence the transmit >> buffer is ready to receive more data. It doesn't tell you >> anything about the Tx shift register, which typically >> (unsurprisingly) takes one more frame time to send that last >> stop bit. > > I was talking about "shift-register empty" bits that went true > before the stop bit had been sent.Sorry, Grant ;). Even so - I've occasionally come across UART architectures which seem to use two shift registers in series. (Or perhaps I dreamed that?) Or, possibly, the shift register is indeed empty and the stop bit is added automagically? It's been a while, and perhaps my leedle grey cells are, comment dire en anglais, scrambled? Steve -- http://www.fivetrees.com
Reply by ●February 12, 20092009-02-12
rickman wrote:> CBFalconer wrote: >> Vasilis wrote: >>> >> ... snip ... >>> >>> i know that rts/cts handshake must be performed manually. could >>> you please tell me what actions must be performed? the only thing >>> i do now is to raise the request to send signal, send data, then >>> lower it and wait for response. >> >> Raise rts, await cts, send data, lower rts. You never send data >> without cts being asserted by the receiver. Those acronyms stand >> for request/clear to send. > > I thought this was an RS-485 interface. That only has tri-state data > signals between the two devices. The RTS signal is used to enable the > driver for transmission. I'm sure you know about this. I expect you > just didn't get the context.Yes, but you need to connect the interface to the line to send. rts does this. cts announces that the connection has been made. You can get away with less, but the net signal is less positive (it depends on default biases) or eats extra power. Normally all devices connected to the RS485 line are disconnected. This says nothing about the number of systems connected, or the number of drivers. RS485 is a hardware standard, not a communication standard. It is often used to transmit/receive 8-bit bytes, which includes the complete ASCII symbols. -- [mail]: Chuck F (cbfalconer at maineline dot net) [page]: <http://cbfalconer.home.att.net> Try the download section.
Reply by ●February 12, 20092009-02-12
Steve at fivetrees wrote:> "Grant Edwards" <grante@visi.com> wrote: >> Paul Keinanen <keinanen@sci.fi> wrote: >> >>> On ordinary PC style 14550 series UARTS it is hard to detect >>> when the last stop bit has been transmitted, either poll the >>> proper UART status bit >> >> I've seen chipsets where that bit wasn't implimented correctly >> and went active before the last stop bit was sent. > > The "transmit buffer empty" flag just says the data has been > loaded into the Tx shift register, and hence the transmit buffer > is ready to receive more data. It doesn't tell you anything > about the Tx shift register, which typically (unsurprisingly) > takes one more frame time to send that last stop bit. > > So: use the flag to start a timer for e.g. 1.5 chr times, *then* > disabled the transmitter. Or, as Paul says, monitor your own > transmissions (closely: doing so periodically is nowhere near > good enough).So don't use a 14550 UART. If you are bit-banging the UART you have no problem, you can build the appropriate timing into the software. Otherwise look for a UART with a 'transmit shift register not empty' signal. Please don't strip attributions for quoted material. I hope I have restored them accurately. -- [mail]: Chuck F (cbfalconer at maineline dot net) [page]: <http://cbfalconer.home.att.net> Try the download section.
Reply by ●February 13, 20092009-02-13
On 2009-02-13, CBFalconer <cbfalconer@yahoo.com> wrote:> So don't use a 14550 UART. If you are bit-banging the UART > you have no problem, you can build the appropriate timing into > the software. Otherwise look for a UART with a 'transmit > shift register not empty' signal.If you're shopping for a UART, pick one that does half-dupex RTS control in HW. :) -- Grant
Reply by ●February 13, 20092009-02-13
On Thu, 12 Feb 2009 20:05:09 -0500, CBFalconer <cbfalconer@yahoo.com> wrote:>rickman wrote: >> CBFalconer wrote: >>> Vasilis wrote: >>>> >>> ... snip ... >>>> >>>> i know that rts/cts handshake must be performed manually. could >>>> you please tell me what actions must be performed? the only thing >>>> i do now is to raise the request to send signal, send data, then >>>> lower it and wait for response. >>> >>> Raise rts, await cts, send data, lower rts. You never send data >>> without cts being asserted by the receiver. Those acronyms stand >>> for request/clear to send. >> >> I thought this was an RS-485 interface. That only has tri-state data >> signals between the two devices. The RTS signal is used to enable the >> driver for transmission. I'm sure you know about this. I expect you >> just didn't get the context. > >Yes, but you need to connect the interface to the line to send. >rts does this. cts announces that the connection has been made.That CTS connection is only required for the RS-232 port and SW driver. In practice, the CTS is simply connected to the RTS line at the converter or the CTS could also be connected to the RTS line (which going to the transceiver) at the RS-232 D9 connector at the PC etc.>You can get away with less, but the net signal is less positive (it >depends on default biases) or eats extra power.While the fail-safe termination will consume some power, it is usually a small price to pay to have a stable bus between bus transactions. The only protocol in which the separate RTS/CTS handshake might be usable is Modbus, in which the protocol specifies that the bus should be driven into idle ("1") state for at least 1.5 character times, before sending the actual frame. This is intended to let any transmitter turn on transient reflections to die out and also let any spurious noise generated by an unterminated floating bus being purged (a pause longer than 1.5 character times are considered spurious in Modbus). The transceiver in a Modbus could be turned on into the idle ("1") state, start a HW timer, which expires after 1.5 character times, then activates the CTS and SW driver then sends the actual message. However, I have never seen such circuits, one serious problem is that you would have to reprogram the timer (DIP switches etc.) each time the bit rate is changed. With the "fail-safe" termination, the bus is constantly terminated by a low impedance, thus reducing the risk for any interference that might otherwise be connected to a high impedance floating bus. Any transmitter turn on should produce only a minor voltage step (or any) when going from the fail-safe idle to the active driven idle state, before the first start bit is actually transmitted. If such step even exists, it is dissipated at the end of the line at the terminating resistor and not bouncing forth and back along as in the unterminated bus case.>Normally all devices connected to the RS485 line are disconnected.All the transmitters are normally in the high impedance tri-state state, while all receivers are continuously connected to the bus, drawing some input transistor bias current, represented as the "unit load" in the RS-485 standard. Paul
Reply by ●February 13, 20092009-02-13
On Feb 12, 8:05 pm, CBFalconer <cbfalco...@yahoo.com> wrote:> rickman wrote: > > > I thought this was an RS-485 interface. That only has tri-state data > > signals between the two devices. The RTS signal is used to enable the > > driver for transmission. I'm sure you know about this. I expect you > > just didn't get the context. > > Yes, but you need to connect the interface to the line to send. > rts does this. cts announces that the connection has been made. > You can get away with less, but the net signal is less positive (it > depends on default biases) or eats extra power.I'm lost. What generates CTS? RTS controls the enable on the RS-485 driver. When that is asserted, why do you need something to tell you that it has been asserted??? What generates the CTS signal? RTS and CTS are both signals in the RS-232 standard. They don't exist in the RS-485 environment other than unused pins on the UART. So they use the RTS to control the enable on the RS-485 driver because it is convenient. If that signal was not there, they would just use some other I/O signal.> Normally all devices connected to the RS485 line are disconnected. > This says nothing about the number of systems connected, or the > number of drivers. RS485 is a hardware standard, not a > communication standard. It is often used to transmit/receive 8-bit > bytes, which includes the complete ASCII symbols.Yeah, what's your point? Rick
Reply by ●February 13, 20092009-02-13
On Feb 12, 5:24=A0pm, "Steve at fivetrees" <st...@NOSPAMTAfivetrees.com> wrote:> "Grant Edwards" <gra...@visi.com> wrote in message > > > I was talking about "shift-register empty" bits that went true > > before the stop bit had been sent. > > Sorry, Grant ;). > > Even so - I've occasionally come across UART architectures which seem to =use> two shift registers in series. (Or perhaps I dreamed that?) Or, possibly, > the shift register is indeed empty and the stop bit is added automagicall=y?> It's been a while, and perhaps my leedle grey cells are, comment dire en > anglais, scrambled?Actually, I expect that is how most UARTs are made. The shift register holds the start bit and the various other bits *other* than the last stop bit (some UARTs let you program 2 or even 1.5 stop bits). The last stop bit is just a constant 1 that is shifted into the input end of the shift register. So the counter has reached zero when the shift register is full of 1 data and the stop bit is being sent. This is when the tx reg empty flag can go high and is 1 bit too early for the RS-485 transmitter to be disabled. Rick
