dsPIC33 GPIO DMA

Is it possible to hook up a 16 bit parallel  ADC to the GPIO pins on a 
dsPIC33 and have it stream into the DMA RAM?

Thanks,
Thomas 

Thomas Magma escreveu:
> Is it possible to hook up a 16 bit parallel  ADC to the GPIO pins on a 
> dsPIC33 and have it stream into the DMA RAM?
> 
There is logic inconsistency in your question: if the ADC is hooked up 
to the I/O pins how can it access the RAM via DMA?


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Thomas Magma wrote:
> Is it possible to hook up a 16 bit parallel  ADC to the GPIO pins on a 
> dsPIC33 and have it stream into the DMA RAM?
> 
> Thanks,
> Thomas 
> 
> 
Sorry to say that the dsPIC33 family does not have any BUS capability.
That is 16-bit data with a Chip Select, Read and Write pins.

The DMA that is available is only for internal peripherals.

Very few new microcontrollers have any kind of BUS I/O, not without 100 
or more pins.

good luck

don

don <don> wrote:

>Thomas Magma wrote:
>> Is it possible to hook up a 16 bit parallel  ADC to the GPIO pins on a 
>> dsPIC33 and have it stream into the DMA RAM?
>> 
>> Thanks,
>> Thomas 
>> 
>> 
>Sorry to say that the dsPIC33 family does not have any BUS capability.
>That is 16-bit data with a Chip Select, Read and Write pins.

Some have a Parallel Master Port providing an 8bit or multiplexed 16bit bus
interface with DMA support. 

Thomas Magma wrote:
> Is it possible to hook up a 16 bit parallel  ADC to the GPIO pins on a 
> dsPIC33 and have it stream into the DMA RAM?
> 
> Thanks,
> Thomas 
> 
> 
Hello Thomas,

I have discovered this morning that the dsPIC33 family does have a 
parallel BUS.

The manual is not clear on the DMA to PMP interface.

I have looked at the manuals for three 100-pin dsPIC33 parts, only one 
manual had a clear section on the PMP (parallel master port) and how you 
may be able to use it.

However, it was not clear how to use the DMA controller with it.

See http://ww1.microchip.com/downloads/en/DeviceDoc/70286C.pdf
sections 7 and 25

good luck

don

> I have discovered this morning that the dsPIC33 family does have a 
> parallel BUS.
>
> The manual is not clear on the DMA to PMP interface.
>
> I have looked at the manuals for three 100-pin dsPIC33 parts, only one 
> manual had a clear section on the PMP (parallel master port) and how you 
> may be able to use it.
>
> However, it was not clear how to use the DMA controller with it.
>
> See http://ww1.microchip.com/downloads/en/DeviceDoc/70286C.pdf
> sections 7 and 25
>
> good luck
>
> don

Hi Don,

Thanks for the response. I looked at the datasheet link that you provided 
and could not see what you were referring to. Section 7 is titled Interrupt 
Controller and section 25 is Electrical Characteristics. I couldn't find 
anything that talked about parallel master ports. Though Figure 1-1 on the 
data sheet looks like the GPIO share the same X Data Bus as the peripherals 
which is tied to the DMA controller, but there would have to be some sort of 
control lines that would clock the GPIO data into the DMA RAM, and if that 
were the case you would think that it would be clearly documented in the 
datasheets.

I guess all I'm trying to do is use the dsPIC's DMA as a parallel FIFO so I 
don't lose any ADC samples when the processor is doing other tasks.

Any other thoughts on the topic?

Thomas 

Thomas Magma wrote:
>> I have discovered this morning that the dsPIC33 family does have a 
>> parallel BUS.
>>
>> The manual is not clear on the DMA to PMP interface.
>>
>> I have looked at the manuals for three 100-pin dsPIC33 parts, only one 
>> manual had a clear section on the PMP (parallel master port) and how you 
>> may be able to use it.
>>
>> However, it was not clear how to use the DMA controller with it.
>>
>> See http://ww1.microchip.com/downloads/en/DeviceDoc/70286C.pdf

section 8 and 26

>> sections 7 and 25

These are for version A of this document.

>>
>> good luck
>>
>> don
> 
> Hi Don,
> 
> Thanks for the response. I looked at the datasheet link that you provided 
> and could not see what you were referring to. Section 7 is titled Interrupt 
> Controller and section 25 is Electrical Characteristics. I couldn't find 
> anything that talked about parallel master ports. Though Figure 1-1 on the 
> data sheet looks like the GPIO share the same X Data Bus as the peripherals 
> which is tied to the DMA controller, but there would have to be some sort of 
> control lines that would clock the GPIO data into the DMA RAM, and if that 
> were the case you would think that it would be clearly documented in the 
> datasheets.
> 
> I guess all I'm trying to do is use the dsPIC's DMA as a parallel FIFO so I 
> don't lose any ADC samples when the processor is doing other tasks.

What is the actual data rate you want ??

Not all dsPIC have access to the PMP logic.
Thats why the comment about 100 pins or larger.

If this is a real product, contact Microchip Tech support.

I have found them very useful.

don


> 
> Any other thoughts on the topic?
> 
> Thomas 
> 
>