Forums

DSS Interface

Started by rickman July 26, 2010
We happen to be doing an upgrade to an existing card I am selling a
customer and they are asking about the feasibility of providing a DSS
interface (56 kbps AMI encoding).  Their thought was to use the audio
I/O which has very strong differential drivers with an output
impedance of 50 ohms.  We can boost the sample rate up to 212 ksps,
but with a fixed sample rate.  To extract the clock would require a
bit of signal processing, but I feel it is "doable".

However, we also have an EIA-422 interface on board and I realized
that it might be possible to use this instead.  The AMI encoding
requires detection of three levels, +V, 0V and -V.  The 422 receivers
have bias resistors added for other purposes which can be used to set
a threshold on the input of say, 0.4 volts.  One input can be wired
direct and the other inverted detecting both polarity of pulses as
distinct from the zero state.

The output can be done by using one pin from each of two differential
drivers so that both are low, one is high or the other is high.

My concern with this is the lack of adjustment for signal levels.
Whatever threshold is picked for the input would limit the sensitivity
for low signals and also limit the noise discrimination for larger
signals.  Likewise, the output would have a single, fixed level.  It
looks like these signals are measured as dBdsx (relative to 6 Vpp),
but I haven't found any info on what levels are used.  I found test
equipment input specs of +6 to -35 dBdsx.  I believe my input circuit
would do ok at a range of +6 to -15 dBdsx or possibly down to -20
dBdsx.  -35 dBdsx is only 0.1 Vpp which is too low to reliably detect
using this circuit.

Anyone here worked with DSS interfaces?  Any info on what levels are
used on the line?

Rick
It would help if I used the right abbreviation, DDS for Digital Data
System and older telecom data interface similar to T1, but slower,
with no framing I believe.

Rick

On Jul 26, 10:19=A0am, rickman <gnu...@gmail.com> wrote:
> We happen to be doing an upgrade to an existing card I am selling a > customer and they are asking about the feasibility of providing a DSS > interface (56 kbps AMI encoding). =A0Their thought was to use the audio > I/O which has very strong differential drivers with an output > impedance of 50 ohms. =A0We can boost the sample rate up to 212 ksps, > but with a fixed sample rate. =A0To extract the clock would require a > bit of signal processing, but I feel it is "doable". > > However, we also have an EIA-422 interface on board and I realized > that it might be possible to use this instead. =A0The AMI encoding > requires detection of three levels, +V, 0V and -V. =A0The 422 receivers > have bias resistors added for other purposes which can be used to set > a threshold on the input of say, 0.4 volts. =A0One input can be wired > direct and the other inverted detecting both polarity of pulses as > distinct from the zero state. > > The output can be done by using one pin from each of two differential > drivers so that both are low, one is high or the other is high. > > My concern with this is the lack of adjustment for signal levels. > Whatever threshold is picked for the input would limit the sensitivity > for low signals and also limit the noise discrimination for larger > signals. =A0Likewise, the output would have a single, fixed level. =A0It > looks like these signals are measured as dBdsx (relative to 6 Vpp), > but I haven't found any info on what levels are used. =A0I found test > equipment input specs of +6 to -35 dBdsx. =A0I believe my input circuit > would do ok at a range of +6 to -15 dBdsx or possibly down to -20 > dBdsx. =A0-35 dBdsx is only 0.1 Vpp which is too low to reliably detect > using this circuit. > > Anyone here worked with DSS interfaces? =A0Any info on what levels are > used on the line? > > Rick
>It would help if I used the right abbreviation, DDS for Digital Data >System and older telecom data interface similar to T1, but slower, >with no framing I believe.
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