"Meindert Sprang" <mhsprang@NOcustomSPAMware.nl> wrote in message news:10c44qdpsnodc7e@corp.supernews.com...> "rickman" <spamgoeshere4@yahoo.com> wrote in message > news:40C1E612.BBE1DA53@yahoo.com... > > > jmp test > > > ... > > > > The jmp test instruction is clearly more than a 1 byte instruction. > > Why "clearly"? > Not on many (most?) DSP processors.It's a single "word" on most PIC chips as well.
How to choose a firmware partner
Started by ●May 26, 2004
Reply by ●June 5, 20042004-06-05
Reply by ●June 5, 20042004-06-05
Meindert Sprang wrote:> "rickman" <spamgoeshere4@yahoo.com> wrote in message > news:40C1E612.BBE1DA53@yahoo.com... > >>> jmp test >>>... >> >>The jmp test instruction is clearly more than a 1 byte instruction. > > > Why "clearly"?Jmp = 1 byte test (an address) = 1 byte or more However jmp @test COULD BE a single byte. -- RM
Reply by ●June 6, 20042004-06-06
> Jmp = 1 byte > test (an address) = 1 byte or more > > However jmp @test COULD BE a single byte. -- RM >I think the OP is taking about a PIC processor. Being a harvard architecture chip, the program memory can be and is a different width then the data memory. You cannot address program memory in bytes, only in words. There is no possibility of the instructions being misaligned. However, the OP's code will most likely fail because of the read-modify-write problem. A few NOPs should go in between the set and clear instruction on the low end PICs. A WDT is like a seatbelt. Hopefully you'll never need it, but if you do, you'll be glad its there. Al
Reply by ●June 6, 20042004-06-06
In article <40c29114$0$11495$5a62ac22@freenews.iinet.net.au>, Al Borowski <aj.borowski@erasethis.student.qut.edu.au> writes> >> Jmp = 1 byte >> test (an address) = 1 byte or more >> >> However jmp @test COULD BE a single byte. -- RM >> > > >I think the OP is taking about a PIC processor. Being a harvard >architecture chip, the program memory can be and is a different width >then the data memory.This is incorrect... It can be but usually isn't. It might be on PIC but not on other systems> You cannot address program memory in bytes, only >in words.This may be true on PIC but not for Harvard architecture per say. /\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\ \/\/\/\/\ Chris Hills Staffs England /\/\/\/\/\ /\/\/ chris@phaedsys.org www.phaedsys.org \/\/ \/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/
Reply by ●June 6, 20042004-06-06
Chris Hills wrote:> In article <40c29114$0$11495$5a62ac22@freenews.iinet.net.au>, Al > Borowski <aj.borowski@erasethis.student.qut.edu.au> writes > >>>Jmp = 1 byte >>>test (an address) = 1 byte or more >>> >>>However jmp @test COULD BE a single byte. -- RM >>> >> >> >>I think the OP is taking about a PIC processor. Being a harvard >>architecture chip, the program memory can be and is a different width >>then the data memory. > > > This is incorrect... It can be but usually isn't. It might be on PIC > but not on other systemshmm, OK, rephase that to "the program memory can be and *in this case* is a different width ". I guess I was a bit unclear. cheers, Al> > >
Reply by ●July 16, 20042004-07-16
Michael R. Kesti <mkesti@gv.net> wrote:> CBarn24050 wrote: > > >The watchdog timer is a fairly recent invention, > > The first watchdog timers I came across was in 1980 and had been included > in the product for a year or two prior to that. As this was roughly the > dawn of embedded processing it is not what I would call "fairly recent."umm... i'm pretty sure various engines in the 1800s had teh equivalent of watchdog timers and so did (and do) many mainframes. -- Sander +++ Out of cheese error +++
Reply by ●July 17, 20042004-07-17
On Fri, 16 Jul 2004 20:40:00 +0000 (UTC), Sander Vesik <sander@haldjas.folklore.ee> wrote:>umm... i'm pretty sure various engines in the 1800s had teh equivalent of >watchdog timers and so did (and do) many mainframes.Can you name any of these mainframes ? I do not see a reason why anybody would use them. In computer systems with memory protection hardware, illegal addresses, garbled data or garbled code usually caused segment fault, parity error traps and illegal opcode traps, i.e. hardware interrupts that are vectored into kernel mode space. The interrupt handler may then decide what to do, try to recover or print CRASH and dump the registers on the console and then halt or reboot the system. On mainframes with a separate console processor, the console processor may try to check the sanity of the main processor, but even then, the decision to reboot is usually done manual. Paul
Reply by ●July 17, 20042004-07-17
Paul Keinanen <keinanen@sci.fi> wrote:> On Fri, 16 Jul 2004 20:40:00 +0000 (UTC), Sander Vesik > <sander@haldjas.folklore.ee> wrote:> >umm... i'm pretty sure various engines in the 1800s had teh equivalent of > >watchdog timers and so did (and do) many mainframes.> Can you name any of these mainframes ?> I do not see a reason why anybody would use them.Well, back in those days, the watchdog timers would usually come in the shape of trained personnel. They'ld be taught to check certain status indicators on a regular basis, and raise a fuss if anything appeared to be out of hand.. The classical example of a pre-computer age watchdog would be the "dead-man switch" on locomotives. Unless disarmed regularly by the chauffeur, it would bring the train to a stop. -- Hans-Bernhard Broeker (broeker@physik.rwth-aachen.de) Even if all the snow were burnt, ashes would remain.
