about creating an universal 8-bit microcontroller simulator

On Thu, 11 Mar 2004 17:26:49 +0000, Ian Bell wrote:

>Many years ago, the US Gov't asked Harvard and Princeton universities to
>come up with a computer architecture suitable for computing tables of naval
>artillery shell trajectories.  The Princeton architecture, with its common
>address space for program and data, is also commonly known by its chief
>scientist's name, Von Neumann.

Have you got any authoritative reference for that? The only Google
references that I found that call it "Princeton architecture" seem to
be from, errr..., some cow-college called Princeton University. Might
they possibly be biased in some way?

Googling "von Neumann architecture" or "harvard architecture" produce
thousands of references, of course.

-- 
  Max

On Thu, 11 Mar 2004 19:27:24 +0000 (UTC), Max <mtj2@btopenworld.com>
wrote:

>On Thu, 11 Mar 2004 17:26:49 +0000, Ian Bell wrote:

>Googling "von Neumann architecture" or "harvard architecture" produce
>thousands of references, of course.

It's in common usage. Try Googling for ' "Princeton architecture"
computer '

-- Jim McGinnis

seemanta dutta wrote:
> Hi,
> I have thought of a free software project in my mind. I need your
> opinion on it because currently I am familiar only with the 8051
> microcontroller.
> 
> As you would have alreay guessed by now, I am planning to create a
> Universal 8-bit Microcontroller simulator for the linux platform. Yes,
> there are such software already in the  market, but AFIK they are all
> proprietary products and are not GPL'ed software. Besides as far as my
> information goes, there has never been any Universal simulator that
> can run on the Linux environment - proprietary or free.
> I am doing this for my undying love for both microcontrollers as well
> as the Linux platform.
> 
> What I plan to create is a 'Simulator Engine', that based on a ascii
> text configuration file, will churn out the *code* for the
> simulator.The user then has to compile this customised code. That way
> I don't have to worry about incorporating code for each and every
> microprocessor core into my main code. That will also give users a
> higher degree of freedom. Everything including register information,
> instruction format and instruction operation has to be documented in
> this file. I am hopeful that given proper documentation, users will
> not feel bugged to create their own configuration files ;-)
> 
> Now my question is: Do the 8-bit microprocessors share that much
> degree of similarity that a generic 'Engine' can be created? In case
> they do then it will truly be wonderful.If not, the whole idea has to
> dropped on the basis that all microprocessor cores are too dissimilar
> to enable a generic 'Simulator Engine'.
> I have very little idea about other microcontrollers hence I am
> counting on you folks for feedback.
> In case you give me the go-ahead, I shall start researching about
> other microcontrollers and after listing out their similarities, start
> working on the Engine.
> 
> 
> Thanks and regards,( especially for enduring such a long post...)
> Seemanta Dutta

  There are 3 big portions to a simulator
* OpCode Parsing and execution
* Peripheral interfaces and simulations
* User interface

  The first item is what you seem to be describing.
Besides looking at gdb as others have suggested, look also at Alfred 
Arnold's AS http://john.ccac.rwth-aachen.de:8000/as/download.html
  This is a universal assembler, with source.

  Since your intention is to provide source, I'd skip the concept of a 
table/script simulator, (which will be very slow) and work on
a compiled version, with one Module/DLL per processor core.

  Each opcode typically needs only a few lines of code, plus the
calling structures, which can be case statements, or procedure arrays,
or a combination of both.
  That's the advantage of direct SW code for simulation, you can cover 
all the tiny wrinkles (once you now what they are... )

-jg

Max wrote:

> On Thu, 11 Mar 2004 17:26:49 +0000, Ian Bell wrote:
> 
>>Many years ago, the US Gov't asked Harvard and Princeton universities to
>>come up with a computer architecture suitable for computing tables of
>>naval
>>artillery shell trajectories.  The Princeton architecture, with its common
>>address space for program and data, is also commonly known by its chief
>>scientist's name, Von Neumann.
> 
> Have you got any authoritative reference for that? The only Google
> references that I found that call it "Princeton architecture" seem to
> be from, errr..., some cow-college called Princeton University. Might
> they possibly be biased in some way?
> 
> Googling "von Neumann architecture" or "harvard architecture" produce
> thousands of references, of course.
> 

It is is Myke Predko's book 'Programming and customising the 8051
Microcontroller' as I tried to hint in the sig of the last post. Depends
wether or not you consider that authoritative.

Ian

Ian

<snip>

>   The first item is what you seem to be describing.
> Besides looking at gdb as others have suggested, look also at Alfred 
> Arnold's AS http://john.ccac.rwth-aachen.de:8000/as/download.html
>   This is a universal assembler, with source.
> 
Thanks for your link.It was great!!

>   Since your intention is to provide source, I'd skip the concept of a 
> table/script simulator, (which will be very slow) and work on
> a compiled version, with one Module/DLL per processor core.
> 
Could explain that a little bit more? I mean, what do you mean exactly
by a table/script simulator? Yeah, about DLLs, that's what I plan to
do actually.
Here's my plan.

I shall have a GUI for the simulator-cum-assembler. The GUI will use a
shared library that will house all the code for all the micro cores
supported by the project.

Now the most exciting and beautiful part is that the user can himself
add personalised cores to the shared library and hence expand the
usefulness of the whole software. For this the user will create a text
configuration file whose syntax will be predefined and documented in
the project documentation. Next he/she has to run the 'Code Churner'
that will parse this text file and generate the code which will then
be added to the shared library through a simple automated shell script
after compilation. Once added to the shared library, the core added
will be immediately visible in the drop down list (or a similar
widget) in the GUI. From that point onwards, the GUI will start
supporting the new core, assmebling and simulating all code for it.
The 'Code Churner' will be embedded as a part of the GUI as well as a
command line utility so that both experts and novices are comfortable
with it.

This leads to a very interesting situation.
For example, at the time of releasing it may support just 3-4 cores,
but soon after the involvement of several users, the number of
supported cores will increase drastically.
Besides users can always share the core library at any point of time
and hence get immediate results of being able to use already existing
cores.

The main task is of creating the 'Code Churner' utility, after that
time will take its own course and the utility of the project will
increase manifold.

That is how I perceive my idea. Please feel free to point out if this
idea is flawed or not.




( Please pardon me if I am going for Linux...but Linux it will be if
at all this takes off..what better way of contributing to the GNU
movement!! )

AndtThanks for such a great response!!,
Seemanta Dutta