Multiple flash roms

Hello!

I�d like to connect either one or two flash-roms to a 32bit-processor 
(motorola coldfire 5272).

I found some documentation at amd.com, they suggest two possibilities:
When using one chip, A[0...N-1](Flash) should be connected to A[1...N](CPU).
When using two chips, A[0...N-1](Flash) should be connected to 
A[2...N+1](CPU).

Those two wiring methods are not compatible, I can not just let one 
socket unused due to the additional shift in the address lines.

I do not know exactly how much space the software will need, so I would 
like to be flexible in that case. On the other hand it would be nice to 
have 32bit-performance instead of connecting two flash-roms on a 16bit 
data bus (each one with its own chip select).

Does anyone know a solution for my problem?

Thanks in advance,
Tankred M�ller.

Tankred M�ller wrote:
> I found some documentation at amd.com, they suggest two possibilities:
> When using one chip, A[0...N-1](Flash) should be connected to 
> A[1...N](CPU).
> When using two chips, A[0...N-1](Flash) should be connected to 
> A[2...N+1](CPU).

That's 16 bit and 32 bit.

> I do not know exactly how much space the software will need, so I would 
> like to be flexible in that case. On the other hand it would be nice to 
> have 32bit-performance instead of connecting two flash-roms on a 16bit 
> data bus (each one with its own chip select).
> 

Use brain... if you want the 32 bit performance for the bigger software, 
why won't you want it for the smaller thingy? Choose 16 bit and one 
socket or 32 bit and two sockets, and accept that you have to pay the 
extra for the two devices even if it turns out to fit in one. Maybe you 
can put two smaller cheaper ones in....

Paul Burke

Paul Burke wrote:
> Tankred M�ller wrote:
> 
>> I found some documentation at amd.com, they suggest two possibilities:
>> When using one chip, A[0...N-1](Flash) should be connected to 
>> A[1...N](CPU).
>> When using two chips, A[0...N-1](Flash) should be connected to 
>> A[2...N+1](CPU).
> 
> 
> That's 16 bit and 32 bit.
> 
>> I do not know exactly how much space the software will need, so I 
>> would like to be flexible in that case. On the other hand it would be 
>> nice to have 32bit-performance instead of connecting two flash-roms on 
>> a 16bit data bus (each one with its own chip select).
>>
> 
> Use brain... if you want the 32 bit performance for the bigger software, 
> why won't you want it for the smaller thingy? Choose 16 bit and one 
> socket or 32 bit and two sockets, and accept that you have to pay the 
> extra for the two devices even if it turns out to fit in one. Maybe you 
> can put two smaller cheaper ones in....
> 
> Paul Burke
> 

well if you can do with one flash and 16bit performance thats nice, if you
need two flash you might as well get the extra performance from using them
in parallel and then you only need one size of flash ...

if its standard flash you could wire it for 32 bit but add the option of
connecting A[N-1](flash) in one of the sockets to either A[2...N+1](CPU)
OR A[1](cpu) with e.g. a jumper

It'll put all even addresses in lower part of flash and all uneven addresses
in upper part of flash when running in 16bit mode, but except for programming
commands that shouldn't matter, and when you program the flash you can handle
that in software

-Lasse

Hello!

> well if you can do with one flash and 16bit performance thats nice, if you
> need two flash you might as well get the extra performance from using them
> in parallel and then you only need one size of flash ...
> 
> if its standard flash you could wire it for 32 bit but add the option of
> connecting A[N-1](flash) in one of the sockets to either A[2...N+1](CPU)
> OR A[1](cpu) with e.g. a jumper
I thought of that. In this case I would wire one socket in the 
A[2...N+1] way to the CPU, the other one (I just call it Heimo for 
better reference ;-) too.

The difference in both sockets would be that I connect A[N-1](heimo) to 
A[1] of the CPU, when in 16bit mode, and to A[N+1](cpu), when in 32bit 
mode.

Another option would be wiring Heimo like the standard 16bit way ( 
A[0...N](heimo) to A[1...N+1](cpu), and switching A[0](heimo) to 
A[N+2](cpu).

Did I understand you correctly?

But I think this would work only in theory. As you already mentioned, 
there will be problems with erasing/programming the device, at least if 
a non uniform sectored flash device is being used (boot block flash or 
something like that).
As I�ll program the memory "in circuit" I think I�ll use the traditional 
way - two flash chips on a common 16bit data bus with an individual chip 
select for each one. In "heimo"-notation: CS(heimo)=CS(all flash)AND NOT 
A[N+1](cpu); CS(second, optional flash)=CS(all flash) AND A[N+1](CPU). 
Is this correct?

Thank you for your help, Lasse, I hope I can repay you for this some time...

Greetings from hanover...

Tankred.