Scott McDonnell wrote:> Thanks everyone for all the responses with information and real world > advice. I think I will probably work with CPLDs to begin with, just to get > myself familiar with the tools, synthesis, simulation, etc.. then I will > move on to FPGAs to implement in some of my real projects. I see Devry eSOC > boards on Ebay going fairly cheap that would give me a platform to start > making things happen. These are based on Altera Max Plus CPLDs and have dip > switches, 7 segment displays, JTAG interface, and protoboard pins. > > Perhaps the best approach to that last bit would be to take a project I have > built with discrete logic and attempt to implement it in HDL. That way I > know exactly what to expect and what might be wrong if it doesn't work like > it should. > > As far as languages - mostly, I am familiar with ABEL, but from the Verilog > and VHDL source I have seen, it shouldn't be too much of a leap to work in > those languages instead. I've been looking for a good reference book from > Amazon that will help ease the transistion.If you've done some TTL design, you might find it useful to play with the schematic capture tools. With Xilinx you can enter a schematic and then look at the HDL code that was created from it.
CPLD and FPGA designs
Started by ●March 6, 2004
Reply by ●March 9, 20042004-03-09
Reply by ●March 11, 20042004-03-11
Jim Stewart wrote:> > Scott McDonnell wrote: > > Thanks everyone for all the responses with information and real world > > advice. I think I will probably work with CPLDs to begin with, just to get > > myself familiar with the tools, synthesis, simulation, etc.. then I will > > move on to FPGAs to implement in some of my real projects. I see Devry eSOC > > boards on Ebay going fairly cheap that would give me a platform to start > > making things happen. These are based on Altera Max Plus CPLDs and have dip > > switches, 7 segment displays, JTAG interface, and protoboard pins. > > > > Perhaps the best approach to that last bit would be to take a project I have > > built with discrete logic and attempt to implement it in HDL. That way I > > know exactly what to expect and what might be wrong if it doesn't work like > > it should. > > > > As far as languages - mostly, I am familiar with ABEL, but from the Verilog > > and VHDL source I have seen, it shouldn't be too much of a leap to work in > > those languages instead. I've been looking for a good reference book from > > Amazon that will help ease the transistion. > > If you've done some TTL design, you might > find it useful to play with the schematic > capture tools. With Xilinx you can enter > a schematic and then look at the HDL code > that was created from it.I would not expect that to be useful. I have not looked, but I bet a schematic is translated to "instantiated" HDL rather than RTL or "inferred" HDL. Not many people "instantiate" a lot of code (except for Ray A). -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAX
