Limiting slew rate (PIC driving LEDs)

Max <mtj2@btopenworld.com> writes:

> >of the LEDs is 10 kHz. The worst-case signal is a perfect square
> >wave, as there are only sharp odd harmonics.
> 
> I'm not clear why you say that's the "worst" case.
> 
> Anything other than a "perfect" square wave (i.e. 50% duty cycle,
> infinite dV/dt) will radiate even harmonics as well as odd.

True. But they do not increase the energy of the signal at all.
So, all the energy on the even harmonics is away from the odd
harmonics. Further, if there is jitter in the frequency, the
peaks will get flatter and lower. The EMC tests measure peaks,
not averages. (Even though, in this case, read on...)

In practice, the signal is not a perfect square wave (0101010101)
at 10 kHz (corresponding to 20 kHz update rate, not 10 kHz, my bad).
It is more a random bitstream (0010111011000101...), where the number
of transitions is smaller (half in the case of a truly random stream).
This reduces the amount of radiated power by half. There may also be 
considerable amount of jitter due to processor interrupt latencies.
This jitter is small, but possibly enough to smear the nthousandth
harmonic over its neighbour.

In practice, the possible duty cycle variations and jitter do not
change the measurement results much. This is due to the fact that
the peak spacing (10 kHz in my example) is narrower than the
spectral analyzer bandwidth (30 kHz, IIRC). So, it really does not
matter whether the power is on one or two or n peaks within the
detection band.

This is good news in the sense that the worst case is not much
worse than anything else. It is bad news in the sense that
you don't win anything be spreading the peaks in software.

> While the
> even harmonics are typically much lower in power, they can be awkward
> if they happen to fall in the wrong place in the spectrum (say within
> a medical-telemetry band).

You are absolutely right with higher frequency components. For example,
a 50 MHz clock producing 100 MHz may be a problem, if you are listening
at the 100 MHz region. But in this specific case, the odd peaks under
measurement are at 30 010 000, 30 030 000, ..., etc. It does not really
matter whether there are even peaks at 30 020 000, etc.

And -- actually quite unfortunately -- the EMC tests do not specify
the limits by the designated use of a frequency band. So, even if 
the peaks are in the wrong place, the device will pass the tests.

- Ville

-- 
Ville Voipio, Dr.Tech., M.Sc. (EE)

"Steve at fivetrees" <steve@NOSPAMTAfivetrees.com> writes:

> Hmmm. I wasn't even really considering repeat rates; I was simply thinking
> in terms of a single sharp edge, parasitic capacitance and hence a current
> (and RFI) spike of indeterminate bandwidth - probably mostly related to
> track length.

This may be a problem. But while the single transition has a lot of energy
on all sorts of frequencies, the average power is low as the repetition
rate is low.

I don't have any idea of the actual structure of the PIC's output
pins. Usually the small micros have rather high-impedance (dozens
of ohms) and slowish output signals. In this case the round-trip
time of the signal is maybe 1.5 ns, and the pin is probably
slow compared to this. So, in this sense the cable is not a
transmission line and the load is close to the driver.

> I tend to be concerned about edge rates of *any* digital signal, no matter
> what the frequency. Perhaps I'm oversimplifying ;).

I do shear you concern. Modern digital families produce all sorts
of surprises with their fast edges. Not only RFI, but also problems
with slow edges, etc.

Anything apart from actual measurements is oversimplification in
EMC... But in this case the margin seems to be large enough.
 
- Ville

-- 
Ville Voipio, Dr.Tech., M.Sc. (EE)

"Ville Voipio" <vvoipio@kosh.hut.fi> wrote in message
news:i3k4qt1zwhc.fsf@kosh.hut.fi...
> Max <mtj2@btopenworld.com> writes:
>
<snip>
> You are absolutely right with higher frequency components. For example,
> a 50 MHz clock producing 100 MHz may be a problem, if you are listening
> at the 100 MHz region. But in this specific case, the odd peaks under
> measurement are at 30 010 000, 30 030 000, ..., etc. It does not really
> matter whether there are even peaks at 30 020 000, etc.
>
> And -- actually quite unfortunately -- the EMC tests do not specify
> the limits by the designated use of a frequency band. So, even if
> the peaks are in the wrong place, the device will pass the tests.
>
> - Ville
>
> -- 
> Ville Voipio, Dr.Tech., M.Sc. (EE)

Dear Ville,

Many thanks for your feedback on this. I appreciate it is a difficult area
to make predictions, but you have reassured me somewhat that this is
unlikely to be a problem with regard to EMC regulations. I was focussing on
it since the lines from the PIC to the LEDs are 5" (12cm) long and carry
some of the highest currents in the design.

Can I please ask then: We also have digital 5V TTL square-wave lines between
ICs, the highest frequency of which is 6.2MHz worst case (01010101...). We
intend to keep track distances as short as possible. But how short do they
need to be to be likely to avoid EMC issues? Is there a way of calculating
this?

Many thanks,

Jim