Hello, I have a custom PCB with FT2232H and FPGA on board. Writing from PC to FPGA via FT2232H in FT245 synchronuous FIFO mode workd perfect. However, I've got some problems with reading from FPGA to PC in this mode. Below is a part of my VHDL code responsible for it: USB_CLK: in std_logic; RST : in std_logic; TXE_n : in std_logic; WR_n : out std_logic; USB_DATA: inout std_logic_vector(7 downto 0); RAM_DATA: in std_logic_vector(7 downto 0); RD_ADDR: out std_logic_vector(12 downto 0); signal RD_ADDRs: std_logic_vector(12 downto 0); process (USB_CLK,RST,TXE_n) begin if RST='1' then RD_ADDRs<=(others=>'0'); USB_DATA<=(others=>'Z'); WR_n<='1'; else if USB_CLK'event and USB_CLK='1' then WR_n<=TXE_n; if TXE='0' then USB_DATA<=RAM_DATA; RD_ADDRs<=RD_ADDRs+1; RD_ADDR<=RD_ADDRs; else USB_DATA<=(others=>'Z'); end if; end if; end if; end process; ========= And the software is as below (Delphi): ResetAddressCounters; ftresult:=FT_Read(FT_HANDLE,@FT_In_Buffer,8192,@Read_Result); The RAM contents is 0,1,2,3...255,0,1,2....255,....,.... - total 8kB (32-teeth saw signal) When I run the software for the first time, the data in FT_In_Buffer is rotated right by a random number of bytes.For example 3 bytes: 253,254,255,0,1,2,3....255,0,1,2....255,0,1,2....252 Every next call to the above two software routines makes exactly 16 byte rotation right. What do I do wrong? Please help !!
FT2232H synchronuous FIFO mode problem.
Started by ●July 1, 2014