Hello,
I have this ARM eval board from IAR/Olimex. Suddenly (what ever that
means) it stopped working. I can't connect anymore:
~> openocd -f /usr/share/openocd/scripts/interface/jlink.cfg -f ~/iar_lpc4088.cfg
Open On-Chip Debugger 0.8.0-rc1 (2014-04-13-09:11)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.sourceforge.net/doc/doxygen/bugs.html
Info : only one transport option; autoselect 'jtag'
adapter speed: 10 kHz
adapter_nsrst_delay: 200
jtag_ntrst_delay: 200
cortex_m reset_config sysresetreq
cortex_m reset_config sysresetreq
Info : J-Link initialization started / target CPU reset initiated
Info : J-Link ARM Lite V8 compiled Nov 19 2010 15:25:05
Info : J-Link caps 0xb9ff7bbf
Info : J-Link hw version 80000
Info : J-Link hw type J-Link
Info : J-Link max mem block 8496
Info : J-Link configuration
Info : USB-Address: 0xff
Info : Kickstart power on JTAG-pin 19: 0xffffff01
Info : Vref = 3.332 TCK = 1 TDI = 0 TDO = 1 TMS = 0 SRST = 0 TRST = 0
Info : J-Link JTAG Interface ready
Info : clock speed 10 kHz
Info : TAP lpc4088.cpu does not have IDCODE
Warn : JTAG tap: lpc4088.cpu UNEXPECTED: 0x00000000 (mfg: 0x000, part: 0x0000, ver: 0x0)
Error: JTAG tap: lpc4088.cpu expected 1 of 1: 0x410fc241 (mfg: 0x120, part: 0x10fc, ver: 0x4)
Warn : Unexpected idcode after end of chain: 1 0xfffffff8
Error: double-check your JTAG setup (interface, speed, missing TAPs, ...)
Error: Trying to use configured scan chain anyway...
Error: lpc4088.cpu: IR capture error; saw 0x00 not 0x01
Warn : Bypassing JTAG setup events due to errors
Warn : Invalid ACK 0x7 in JTAG-DP transaction
Any hints?
Regards
hmw
--
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OpenOCD, JTAG, ARM
Started by ●March 1, 2015
Reply by ●March 1, 20152015-03-01
On Sun, 01 Mar 2015 16:25:27 +0100, Michael Welle wrote:> Hello, > > I have this ARM eval board from IAR/Olimex. Suddenly (what ever that > means) it stopped working. I can't connect anymore: > > ~> openocd -f /usr/share/openocd/scripts/interface/jlink.cfg -f > ~/iar_lpc4088.cfg Open On-Chip Debugger 0.8.0-rc1 (2014-04-13-09:11) > Licensed under GNU GPL v2 For bug reports, read > http://openocd.sourceforge.net/doc/doxygen/bugs.html > Info : only one transport option; autoselect 'jtag' > adapter speed: 10 kHz adapter_nsrst_delay: 200 jtag_ntrst_delay: 200 > cortex_m reset_config sysresetreq cortex_m reset_config sysresetreq Info > : J-Link initialization started / target CPU reset initiated Info : > J-Link ARM Lite V8 compiled Nov 19 2010 15:25:05 Info : J-Link caps > 0xb9ff7bbf Info : J-Link hw version 80000 Info : J-Link hw type J-Link > Info : J-Link max mem block 8496 Info : J-Link configuration Info : > USB-Address: 0xff Info : Kickstart power on JTAG-pin 19: 0xffffff01 Info > : Vref = 3.332 TCK = 1 TDI = 0 TDO = 1 TMS = 0 SRST = 0 TRST = 0 Info : > J-Link JTAG Interface ready Info : clock speed 10 kHz Info : TAP > lpc4088.cpu does not have IDCODE Warn : JTAG tap: lpc4088.cpu > UNEXPECTED: 0x00000000 (mfg: 0x000, part: 0x0000, ver: 0x0) > Error: JTAG tap: lpc4088.cpu expected 1 of 1: 0x410fc241 (mfg: 0x120, > part: 0x10fc, ver: 0x4) > Warn : Unexpected idcode after end of chain: 1 0xfffffff8 Error: > double-check your JTAG setup (interface, speed, missing TAPs, ...) > Error: Trying to use configured scan chain anyway... > Error: lpc4088.cpu: IR capture error; saw 0x00 not 0x01 Warn : Bypassing > JTAG setup events due to errors Warn : Invalid ACK 0x7 in JTAG-DP > transaction > > > Any hints?Only one, and I hope it's not right. Have you, by chance, changed the function of any port pins on the processor? I can's speak for your particular parts, but all the parts I've used have the "nifty" feature that if you change the function of a JTAG pin away from JTAG, then you're looking at an opportunity to learn surface-mount soldering skills, because the only cure that I know of is to replace the processor. All my ARM software designs have a GPIO pin, on a port that's not used by JTAG (if possible), which, when grounded, goes into a tight little loop. BEFORE any other port-messing goes on. I put it in my startup code, I'm so paranoid. It sounds stupid -- but it's saved my ass numerous times. -- www.wescottdesign.com
Reply by ●March 1, 20152015-03-01
Hello, Tim Wescott <tim@seemywebsite.com> writes: [...]> Only one, and I hope it's not right. Have you, by chance, changed the > function of any port pins on the processor? I can's speak for your > particular parts, but all the parts I've used have the "nifty" feature > that if you change the function of a JTAG pin away from JTAG, then you're > looking at an opportunity to learn surface-mount soldering skills, > because the only cure that I know of is to replace the processor.after thinking about the problem for a while I came to the same conclusion. I'm not sure how this happened, but that's the only thing that could have happened. Well, maybe there is a little chance before my soldering skills come in. The board has a second JTAG port. With a little bit of luck that is still functional. But I need to order an adaptor before I can test that. And then there is the ISCP capability over the RS232 port. If that all doesn't work...> All my ARM software designs have a GPIO pin, on a port that's not used by > JTAG (if possible), which, when grounded, goes into a tight little loop. > BEFORE any other port-messing goes on. I put it in my startup code, I'm > so paranoid. > > It sounds stupid -- but it's saved my ass numerous times.... I have at least learned something and a board equivalent of 200 bucks goes into the display case. Regards hmw -- biff4emacsen - A biff-like tool for (X)Emacs http://www.c0t0d0s0.de/biff4emacsen/biff4emacsen.html Flood - Your friendly network packet generator http://www.c0t0d0s0.de/flood/flood.html
Reply by ●March 1, 20152015-03-01
On 1.3.15 21:32, Michael Welle wrote:> Hello, > > Tim Wescott <tim@seemywebsite.com> writes: > [...] >> Only one, and I hope it's not right. Have you, by chance, changed the >> function of any port pins on the processor? I can's speak for your >> particular parts, but all the parts I've used have the "nifty" feature >> that if you change the function of a JTAG pin away from JTAG, then you're >> looking at an opportunity to learn surface-mount soldering skills, >> because the only cure that I know of is to replace the processor. > after thinking about the problem for a while I came to the same > conclusion. I'm not sure how this happened, but that's the only thing > that could have happened. Well, maybe there is a little chance before my > soldering skills come in. The board has a second JTAG port. With a > little bit of luck that is still functional. But I need to order an > adaptor before I can test that. And then there is the ISCP > capability over the RS232 port. If that all doesn't work... > > >> All my ARM software designs have a GPIO pin, on a port that's not used by >> JTAG (if possible), which, when grounded, goes into a tight little loop. >> BEFORE any other port-messing goes on. I put it in my startup code, I'm >> so paranoid. >> >> It sounds stupid -- but it's saved my ass numerous times. > ... I have at least learned something and a board equivalent of 200 > bucks goes into the display case. > > Regards > hmw >In the Atmel Cortexes, there are inputs for full chip erase. It has rescued me after painting myself in the corner, out of JTAG access. At least the Atmel chips are not happy to talk with JTAG, if they do not have processor clock in. My guess is that this applies to other Cortex-M4 chips, too. It is against the JTAG standard, but I suspect that ARM needs the processor clock for the JTAG state machine. The TCK clock should be enough, but it is not. -- -TV
Reply by ●March 1, 20152015-03-01
Hello, Tauno Voipio <tauno.voipio@notused.fi.invalid> writes: [...]> In the Atmel Cortexes, there are inputs for full chip erase. > It has rescued me after painting myself in the corner, out > of JTAG access.that would help. I skimmed over the documentation earlier this day, but found nothing. More investigation is needed ;). Regards hmw -- biff4emacsen - A biff-like tool for (X)Emacs http://www.c0t0d0s0.de/biff4emacsen/biff4emacsen.html Flood - Your friendly network packet generator http://www.c0t0d0s0.de/flood/flood.html
Reply by ●March 1, 20152015-03-01
Hello, Tauno Voipio <tauno.voipio@notused.fi.invalid> writes: [...]> In the Atmel Cortexes, there are inputs for full chip erase. > It has rescued me after painting myself in the corner, out > of JTAG access.pulling down the ISP enable signal while booting should help for LCP17xx devices. Maybe I'll try and see what happens if I do this with my LPC4088. Regards Gyro -- biff4emacsen - A biff-like tool for (X)Emacs http://www.c0t0d0s0.de/biff4emacsen/biff4emacsen.html Flood - Your friendly network packet generator http://www.c0t0d0s0.de/flood/flood.html
Reply by ●March 1, 20152015-03-01
On Sun, 01 Mar 2015 16:25:27 +0100, Michael Welle wrote:> Hello, > > I have this ARM eval board from IAR/Olimex. Suddenly (what ever that > means) it stopped working. I can't connect anymore: > > ~> openocd -f /usr/share/openocd/scripts/interface/jlink.cfg -f > ~/iar_lpc4088.cfg Open On-Chip Debugger 0.8.0-rc1 (2014-04-13-09:11) > Licensed under GNU GPL v2 > For bug reports, read > http://openocd.sourceforge.net/doc/doxygen/bugs.html > Info : only one transport option; autoselect 'jtag' adapter speed: 10 > kHz > adapter_nsrst_delay: 200 > jtag_ntrst_delay: 200 > cortex_m reset_config sysresetreq > cortex_m reset_config sysresetreq > Info : J-Link initialization started / target CPU reset initiated Info : > J-Link ARM Lite V8 compiled Nov 19 2010 15:25:05 Info : J-Link caps > 0xb9ff7bbf > Info : J-Link hw version 80000 > Info : J-Link hw type J-Link > Info : J-Link max mem block 8496 > Info : J-Link configuration > Info : USB-Address: 0xff > Info : Kickstart power on JTAG-pin 19: 0xffffff01 Info : Vref = 3.332 > TCK = 1 TDI = 0 TDO = 1 TMS = 0 SRST = 0 TRST = 0 Info : J-Link JTAG > Interface ready > Info : clock speed 10 kHz > Info : TAP lpc4088.cpu does not have IDCODE Warn : JTAG tap: lpc4088.cpu > UNEXPECTED: 0x00000000 (mfg: 0x000, part: 0x0000, ver: 0x0) Error: > JTAG tap: lpc4088.cpu expected 1 of 1: 0x410fc241 (mfg: 0x120, part: > 0x10fc, ver: 0x4) Warn : Unexpected idcode after end of chain: 1 > 0xfffffff8 Error: double-check your JTAG setup (interface, speed, > missing TAPs, ...) Error: Trying to use configured scan chain anyway... > Error: lpc4088.cpu: IR capture error; saw 0x00 not 0x01 Warn : Bypassing > JTAG setup events due to errors Warn : Invalid ACK 0x7 in JTAG-DP > transaction > > > Any hints? > > Regards > hmwFirst - does this happen all the time now even from a power on reset? At least on the LPC1769 system reset and jtag reset will not always fix a jtag comms issue. I have to power off the chip. Hold P2[10] low during reset. This may at least get you to the point where the ISP can talk via the serial port. If one of the CRP modes has been set then you may be toast. Those can disable ISP. Look at Table 3 on page 35 of the data sheet and the section on the ISP. -- Chisolm Republic of Texas
Reply by ●March 1, 20152015-03-01
Hello, good news, the I can connect again ;). Thanks to Tauno for pushing me in the right direction. 1kOhm from ISP enable to ground let me connect via JTAG and erase the flash. Regards hmw -- biff4emacsen - A biff-like tool for (X)Emacs http://www.c0t0d0s0.de/biff4emacsen/biff4emacsen.html Flood - Your friendly network packet generator http://www.c0t0d0s0.de/flood/flood.html
Reply by ●March 1, 20152015-03-01
Hello, Joe Chisolm <jchisolm6@earthlink.net> writes: [...]> First - does this happen all the time now even from a power on reset? > At least on the LPC1769 system reset and jtag reset will not always > fix a jtag comms issue. I have to power off the chip.I powered off the device, didn't help. But pulling ISP enable down did the trick, JTAG works again ;). Regards hmw -- biff4emacsen - A biff-like tool for (X)Emacs http://www.c0t0d0s0.de/biff4emacsen/biff4emacsen.html Flood - Your friendly network packet generator http://www.c0t0d0s0.de/flood/flood.html
Reply by ●March 1, 20152015-03-01
On Sun, 01 Mar 2015 21:32:07 +0100, Michael Welle wrote:> Hello, > > good news, the I can connect again ;). Thanks to Tauno for pushing me in > the right direction. 1kOhm from ISP enable to ground let me connect via > JTAG and erase the flash. > > Regards hmwCool. I'm happy to have guessed wrong. (That's one of the benefits of being a pessimist). -- www.wescottdesign.com
