Trace length matching in VHF digital circuit with close chips - needed?

In article <nu2b2s$or5$1@news2.open-news-network.org>, spam@spam.com 
says...
> 
> On 17/10/2016 09:33, colin_toogood@yahoo.com wrote:
> > I recently had a design with very occasional errors writing to NAND
> > flash. After a ridiculous amount of time trying to sort out the flash
> > we realized that the 500MHz DDR3s were being used at 800MHz. They had
> > passed every memory test, which we thought were aggressive. Running
> > the DDRs at 500MHz or fitting 800MHz both cured the NAND failure.
> > Moral to the story, if you don't length match you will never know
> > that you didn't need to. Also remember to find out the trace lengths
> > on the IC packaging.
> 
> In part I agree, but this sounds more a flaw in the design that hasn't 
> taken into account the skew in track lengths. Most PCB CAD packages can 
> tell you the max and min lengths of a bus.

Nope he said they in mistake OVER clocked 500 MHz parts at 800MHz, going
beyond spec of chips NOT trace length on PCB. Correctly clocking devices 
WITHIN spec resolved the problem.
 
> It takes an inordinate amount of time to match track lengths and 
> sometimes a compromise is required in return for a faster part or a 
> lower clock speed.
> 
> My experience is similar to yours, where on the edge, you get the 
> occasional bit errors, fine in some applications but disastrous in others.

Not what he said read above.
 
For majoprity of designs with a FEW chips (like 1 to 4), as long as you 
know what the propagation delay is between min and max length and this 
will be within tolerances you are fine. Concentrate on keeping clocks
and strobes si8milar lengths and if possible data shorter. Higher the 
speed yes ensure terminations are there.

Avoid major dispaities.

When you consider DIMM modules I am sure most tracks are kept short, 
keeping them ALL smae length will be nigh on impossible. If you are 
dealing with DIMM modules the length disparity I am sure is more than 
0.1mm from driving chip die to each die on each DIMM module. You could 
get that difference between different data lines with both die.

Seen too many cases of getting exact track length match made the bus
go all round the houses and cross many other signals. In most of these
cases it was one or two RAM devices. Max track length 50mm in some 
cases.

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On Mon, 17 Oct 2016 15:44:18 +0300, Dimiter_Popoff wrote:

> On 17.10.2016 г. 03:53, Mike Perkins wrote:
>> On 16/10/2016 13:22, Dimiter_Popoff wrote:

>> While you may get away without terminations for data lines, I cannot
>> recommend leaving out terminations for clock and strobe lines. DDR
>> memory should have its own internal termination resistors according to
>> the type of memory.
> 
> DDR1 has no internal terminations, IIRC DDR2 does not have either (not
> so sure about the latter).

DDR2 has internal (on-die) termination. Can be turned on or off.

>>> At these speeds matching to 0.1mm as they typically suggest is simply
>>> nonsense. Of course you will route things the right way - i.e. keep
>>> things straight and short, make sure they cross no discontinueties on
>>> the plane underneath etc. and everything will be all right.
>>
>> I entirely agree on this point, as long as we are not working at the
>> maximum specified clock frequency.

Right, understood.

On Sun, 16 Oct 2016 10:49:45 +0100, Mike Perkins wrote:

> On 16/10/2016 01:20, Tim Wescott wrote:

>> I would hope that there's a specification on how much the trace length
>> can vary -- is such a thing there, or not?

Not that I am aware of, no. :( The closest I could find is the quoted 
application node from Freescale.

> The DDR spec is usually just setup and hold times, and of course clock
> speed.
> 
> This should give you all the information you need.

These are present, however. These clock speeds are a new area for me. I'm 
as conservative as I can be, so I asked before committing. Hardware is no 
software. :)

On Sat, 15 Oct 2016 17:27:27 -0700, lasselangwadtchristensen wrote:

> https://forums.xilinx.com/t5/Memory-Interfaces/lenth-matching-rules-
for-7-series-DDR2/td-p/551665
> 
> ?

Thank you.