SPI Serial EEPROM design

I think I'm doing this but...

To write enable the devices, should I do a WREN (write enable 8 bit
command)  then WRSR (write Status Reg 16 bit command) or in the
opposite order?

I don't always see the WEN bit set in the statyus registers?????????
Some days yes today no.

I can see the status going busy after the above sequence.

I read all ones.

THanks
george

In article <1114294834.754098.71240@l41g2000cwc.googlegroups.com>, 
george.martin@att.net says...
> These EEPROMs store system information and are constantly changing.  So
> I need the 100K writes of EEPROM.
> 
> What is Serail FLASH???
> 
If you need lots of frequent updates, you might investigate the
SPI Ferro-Electric RAM  (FRAM) from RAMTRON.

Mark Borgerson

I found my problem.
THis device only supports 128 byte writes.  One needs to get to a 128
byte boundary and then send 128 bytes of data.  Unsent bytes will be
undefined.

Actually Atmel support guided me through all this.  Good Job Atmel.

And thanks to all who replied.

gm