On 4-Jul-2005, "steven" <stevenPANTSvh@pandora.be> wrote:> > Yup. Somebody recently told me that Swatch does their own uP > > designs now. Current draws down in the 10s of uA. Not sure > > what the clock rate is. Once upon a time 32KHz was common for > > watch stuff. > > 10s of uA?Back in the late 70s, TI watches drew 2 uA, and ran off of 32kHz. I would expect that that there has been a lot of improvement since then. -Hershel
When will the 8051 and othe 8-bits go away?
Started by ●July 1, 2005
Reply by ●July 4, 20052005-07-04
Reply by ●July 4, 20052005-07-04
On Fri, 01 Jul 2005 19:02:30 +0000, Guy Macon <_see.web.page_@_www.guymacon.com_> wrote:> > > >Grant Edwards wrote: > >>All those advances that make the 32-bit parts cheaper and lower >>power are also making the 8-bit parts cheaper and lower power. >>8-bit parts are always going to be cheaper and lower power than >>32-bit parts. 4-bit parts are always going to be cheaper than >>8-bit parts. > >Not really. We have reached the point where the die size >is the same, because the bonding pads dominate. > >>4-bit parts are still sold in huge volumes. > >Less than 5% of the market compared to 8-bits having 30-40%. >http://www.techonline.com/community/ed_resource/feature_article/36930I wonder what's the breakdown of different devices within each category. Most of the 8-bit range is surely 8051. What bugs me about this article (and even this thread) is the lack of mention of DSP's - 16-bit fixed-point DSP's thesedays just happen to be microcontrollers with DSP CPU cores. They're probably not the majority of the 16-bit market, but I wonder what the percentage is. As for the future, I don't see where certain bus widths will survive or go away (the bus is all internal in most microcontrollers anyway), but perhaps some "paradigms" will go away. For example, the idea of separate 8-bit and 16-bit microprocessor-only chips (Z80, 68000) have gone away with the ability to put so much more on a chip, and it only survives with the more powerful 32-bit processors for general-purpose "desktop" computers. Even those may have cache ram and such onchip nowadays. ----- http://www.mindspring.com/~benbradley
Reply by ●July 4, 20052005-07-04
On Mon, 4 Jul 2005 13:25:41 GMT, "Hershel Roberson" <hrjunk01@moment.net> wrote:> >On 4-Jul-2005, "steven" <stevenPANTSvh@pandora.be> wrote: > >> > Yup. Somebody recently told me that Swatch does their own uP >> > designs now. Current draws down in the 10s of uA. Not sure >> > what the clock rate is. Once upon a time 32KHz was common for >> > watch stuff. >> >> 10s of uA? > >Back in the late 70s, TI watches drew 2 uA, and ran off of 32kHz. I would >expect that that there has been a lot of improvement since then. >Maybe it should be 10s of nA ? Regards Anton Erasmus
Reply by ●July 4, 20052005-07-04
Anton Erasmus wrote:> On Mon, 4 Jul 2005 13:25:41 GMT, "Hershel Roberson" > <hrjunk01@moment.net> wrote: > > >>On 4-Jul-2005, "steven" <stevenPANTSvh@pandora.be> wrote: >> >> >>>>Yup. Somebody recently told me that Swatch does their own uP >>>>designs now. Current draws down in the 10s of uA. Not sure >>>>what the clock rate is. Once upon a time 32KHz was common for >>>>watch stuff. >>> >>>10s of uA? >> >>Back in the late 70s, TI watches drew 2 uA, and ran off of 32kHz. I would >>expect that that there has been a lot of improvement since then. >> > > > Maybe it should be 10s of nA ?Present state of the art is seen in the better RTC chips, and 250-500nA is the operate current, to run the Xtal OSC and spin a timer. The limit has more to do with Osc start times, Board leakage, and real XTAL characteristics, than any silicon parameter. Watches have to add the stepper energy to that. -jg
Reply by ●July 5, 20052005-07-05
> My predictions: > > 4-bits will only be used for extreme low power. > 8-bits will never go away. Perfect for toys, keyboards, etc. > 16-bits will not exist by the year 2020. > 32-bits will be here forever. Great size for demanding embedded apps. > 64-bits will not exist by the year 2040. > 128-bits will not exist by the year 2060. > 256-bits will become the top-end. > 512-bits and higher will never happen. Further development will be > in the direction of massive parallel processing on one die, followed > by (unless it turns out to be impossible) quantum computers.The DP8500 Raster Graphics Processor had a central processing unit with 16 bit slave units and with 32 of them you had a 512 bit databus. DIAB Data (now focusing on compilers) built such a system already in 1988... Graphics processors now have 128/256 bit (I think) databusses and parallel units integrated. There are some VLIW DSPs around with 128 bit instructions.> > I don't see 16 bits surviving. It will be squeezed out by 8 and 32. > I don't see 64 or 128 bits surviving. They will be squeezed out by > 32 and 256. >-- A. P. Richelieu
Reply by ●July 6, 20052005-07-06
"Hershel Roberson" <hrjunk01@moment.net> wrote in message news:dabdca02n7k@enews3.newsguy.com...> > On 4-Jul-2005, "steven" <stevenPANTSvh@pandora.be> wrote: > > > > Yup. Somebody recently told me that Swatch does their own uP > > > designs now. Current draws down in the 10s of uA. Not sure > > > what the clock rate is. Once upon a time 32KHz was common for > > > watch stuff. > > > > 10s of uA? > > Back in the late 70s, TI watches drew 2 uA, and ran off of 32kHz. I would > expect that that there has been a lot of improvement since then. >Yes, but back in the late 70s watches had so few functions that they didn't need a uC; a few counters + a few gates would do. That's a saver too.
Reply by ●July 6, 20052005-07-06
"Anton Erasmus" <nobody@spam.prevent.net> wrote in message news:1120506820.677b1f54d5ad2c296b6ba2c1cede6c25@teranews...> On Mon, 4 Jul 2005 13:25:41 GMT, "Hershel Roberson" > <hrjunk01@moment.net> wrote: > > > > >On 4-Jul-2005, "steven" <stevenPANTSvh@pandora.be> wrote: > > > >> > Yup. Somebody recently told me that Swatch does their own uP > >> > designs now. Current draws down in the 10s of uA. Not sure > >> > what the clock rate is. Once upon a time 32KHz was common for > >> > watch stuff. > >> > >> 10s of uA? > > > >Back in the late 70s, TI watches drew 2 uA, and ran off of 32kHz. I would > >expect that that there has been a lot of improvement since then. > > > > Maybe it should be 10s of nA ? >Maybe in powerdown mode, osc off. In most apps with a 32kHz xtal not really a good idea, as a 32kHz osc can take quite some time to become stable.
Reply by ●July 6, 20052005-07-06
"Jim Granville" <no.spam@designtools.co.nz> wrote in message news:42c9ad1d$1@clear.net.nz...> Anton Erasmus wrote: > > On Mon, 4 Jul 2005 13:25:41 GMT, "Hershel Roberson" > > <hrjunk01@moment.net> wrote: > > > > > >>On 4-Jul-2005, "steven" <stevenPANTSvh@pandora.be> wrote: > >> > >> > >>>>Yup. Somebody recently told me that Swatch does their own uP > >>>>designs now. Current draws down in the 10s of uA. Not sure > >>>>what the clock rate is. Once upon a time 32KHz was common for > >>>>watch stuff. > >>> > >>>10s of uA? > >> > >>Back in the late 70s, TI watches drew 2 uA, and ran off of 32kHz. Iwould> >>expect that that there has been a lot of improvement since then. > >> > > > > > > Maybe it should be 10s of nA ? > > Present state of the art is seen in the better RTC chips, and > 250-500nA is the operate current, to run the Xtal OSC and > spin a timer.An RTC is a good option if you can afford one, which I couldn't in the design I mentioned. It allows you to leave the osc running at low power, and have the uC in powerdown mode. The RTC timer could wake up the uC at regular intervals, uC is up and running within microseconds, executes a few instructions and goes back to sleep again. But even then 10nA is really low.
Reply by ●July 6, 20052005-07-06
On Wed, 06 Jul 2005 16:17:08 GMT, "steven" <stevenPANTSvh@pandora.be> wrote:>> Back in the late 70s, TI watches drew 2 uA, and ran off of 32kHz. I would >> expect that that there has been a lot of improvement since then. >> > >Yes, but back in the late 70s watches had so few functions that they didn't >need a uC; a few counters + a few gates would do. That's a saver too.It would be quite hard to build crystal oscillators at extremely low frequencies, the 32768 Hz was chosen as a compromise between the resonator size and the power consumption. In a CMOS frequency chain, the power dissipation is directly proportional to the frequency due to the stray capacitances. Thus, a frequency divider chain consisting of several flip-flops in series, the first flip-flop will consume 1/2 of the chip power consumption, the next 1/4 and the next 1/8 and so on. However, if a uC is used, the obvious idea would be to run the processor at the full 32768 Hz frequency, but this would increase the power dissipation considerably, thus charging and discharging a huge number of stray capacitances all over the chip, while in a simple frequency divider chain, the main (1/2) power dissipation would be in the first flip-flop. To get really low system power consumption, the 32 kHz crystal frequency should first be divided with a trivial frequency divider chain to a lower value and then run the entire uC core at that frequency (at say 1024 or even 64 Hz). There will be a very limited number of instructions that can be executed at such clock rates, but a simple stopwatch application should not need too many instructions. Paul
Reply by ●July 7, 20052005-07-07
Paul Marciano wrote:> 2. Given microcontroller size/power evolution, do you think > ARM/AVR/other will end up in the smallest 8-pin(?) microcontrollers and > 8-bit micros will just fade away? If so, in what time frame?How many controlsignal does your application need? Yes, there is the one-wire debug, that means you need at least 3 pins for a working device and perhaps 4 pins for a debugable working device. You could even aditionally multiplex a bunch of analog inputs and outputs over the very same pin and thus offload the IO to an external chip. However when the sum price of the external IO chip and the cpu counts, one rather spends a few additional pins for the cpu and have the IO integrated. Rene -- Ing.Buero R.Tschaggelar - http://www.ibrtses.com & commercial newsgroups - http://www.talkto.net
