memory mapped IO

Hello,

I have a reference board that I am trying to bring up an ethernet
device.  I am wondering if the memory mapped io register layout for
ethernet is standard?  If so, what is the name of the document(s) I
need for this register map?

Because my question deals on wether or not mmio for ethernet is
standardized, the specific chip shouldn't matter.

Thanks for your time.

Cheers,
Pete

On 11 Jul 2005 06:55:22 -0700, pete <pete_van_echaute@comcast.net> wrote:

> [...] I am wondering if the memory mapped io register layout for
> ethernet is standard?

Yes, quite.  Some processors, like ARM, don't have the concept of IO space 
altogether -- just memory.


>  If so, what is the name of the document(s) I
> need for this register map?

The data sheet for the particular ethernet controller.


> Because my question deals on wether or not mmio for ethernet is
> standardized, the specific chip shouldn't matter.

It *does* matter.  What exactly do your mean by "standardized"?

   Vadim

Thanks for your reply.  What I meant by standardized is like the PCI
configuration space.  For example, given the class code, you can set or
get a few "standard" registers such as a Base Address Register at a
standard offset of the device if it has one.

I do have a few of the data sheets for this device, the nForce4 CK804.
The two main files I have been using, Register Spec and BIOS Porting
Guide, mention nothing on the contents of the MMIO.  It only mentions
that the BAR for it should be setup.

Thanks again.

Cheers,
Pete

On 11 Jul 2005 08:25:26 -0700, pete <pete_van_echaute@comcast.net> wrote:

> I do have a few of the data sheets for this device, the nForce4 CK804.
> [...]

You could possibly find more information in Linux-related groups or forums.

   Vadim