PIC PSP port bus contention

Hi

We're trying to interface a PIC micro to an 8052 micro using the
Parallel Slave Port on the PIC.  The 8052 can read bytes written to it
by the PIC ok, but when the 8052 writes to the PIC, the PIC tends to
read what it last wrote and not what the 8052 sent.  The voltage levels
on the data bus show contention with "half levels" when the PIC and 8052
are opposite states.

Is there something that has to be set differently in the PIC when it's
in "read mode" than when it's in write mode?

TIA

darkknight wrote:
> Hi
> 
> We're trying to interface a PIC micro to an 8052 micro using the

Which PIC are you using ??

> Parallel Slave Port on the PIC.  The 8052 can read bytes written to it
> by the PIC ok, but when the 8052 writes to the PIC, the PIC tends to
> read what it last wrote and not what the 8052 sent.  The voltage levels
> on the data bus show contention with "half levels" when the PIC and 8052
> are opposite states.
> 
Please show your work. Schematic ??


> Is there something that has to be set differently in the PIC when it's
> in "read mode" than when it's in write mode?
> 
I too have interfaced the PSP to a 8051 buss without problems.

What does you PIC code look like ??

donald


> TIA

darkknight wrote:
> Hi
>
> We're trying to interface a PIC micro to an 8052 micro using the
> Parallel Slave Port on the PIC.  The 8052 can read bytes written to it
> by the PIC ok, but when the 8052 writes to the PIC, the PIC tends to
> read what it last wrote and not what the 8052 sent.  The voltage levels
> on the data bus show contention with "half levels" when the PIC and 8052
> are opposite states.
>
> Is there something that has to be set differently in the PIC when it's
> in "read mode" than when it's in write mode?
>
> TIA

It would seem that you are driving the bus with both devices at the
same time. The problm arises beause you have 2 masters. You need to
devise some sort of syncronisation or protocall system to determine who
has control of the bus at any given time.

On Mon, 21 Nov 2005 04:55:23 -0700, Donald wrote:

>darkknight wrote:
>> Hi
>> 
>> We're trying to interface a PIC micro to an 8052 micro using the
>
>Which PIC are you using ??
>
>> Parallel Slave Port on the PIC.  The 8052 can read bytes written to it
>> by the PIC ok, but when the 8052 writes to the PIC, the PIC tends to
>> read what it last wrote and not what the 8052 sent.  The voltage levels
>> on the data bus show contention with "half levels" when the PIC and 8052
>> are opposite states.
>> 
>Please show your work. Schematic ??
>
>
>> Is there something that has to be set differently in the PIC when it's
>> in "read mode" than when it's in write mode?
>> 
>I too have interfaced the PSP to a 8051 buss without problems.
>
>What does you PIC code look like ??


It turns out a bug in the PIC software was clobbering the IOPort setup.
It took a while to track down.  Now it's working fine.

Thanks for the reply.

Hi darkknight,
How are you notifying the 8052 that the byte is ready / has been read?
It seemed to me that the external flag system to the bus was poorly
supported.
Regards
Rocky

On 21 Nov 2005 22:28:29 -0800, Rocky wrote:

>Hi darkknight,
>How are you notifying the 8052 that the byte is ready / has been read?
>It seemed to me that the external flag system to the bus was poorly
>supported.
>Regards
>Rocky

We use a "manually" controlled signal that connects to the EXT 0
interrupt pin on the 8052 and the PIC software drives it high then low
to tell the 8052 that a byte is ready or has been read.  The data sent
between the two micros is multibyte messages and each message indicates
which micro will transmit next after the current message.  One single
lost (or possibly corrupted) character and the link dies - upon which
the 8052 reboots both micros.

darkknight

Hi,

darkknight wrote:
> On 21 Nov 2005 22:28:29 -0800, Rocky wrote:
>
> >Hi darkknight,
> >How are you notifying the 8052 that the byte is ready / has been read?
<Snip>
> We use a "manually" controlled signal that connects to the EXT 0
> interrupt pin on the 8052 and the PIC software drives it high then low
> to tell the 8052 that a byte is ready or has been read.  The data sent

thanks for the feedback

Rocky