SDRAM data garbled due to seperate PCB for SDRAM ???

Hi,

Im trying to interface two 128Mbit SDRAMs (MT48LC8M16A2) to the
AT91RM9200, but it doesnt seem to be going right. I have a custom board
for the AT91, and a seperate board for the SDRAM, the two are connected
through an ordinary ribbon cable.

The master clock of the uC is running at 60Mhz. To test the integrity
of the RAM, im writing data to a series of locations, say from
0x2000_0000 to 0x2000_0100. But when i read the data back, i find it to
be garbled at *many* locations. I mean, instead of 0x11111111 that im
writing, i get a 0xEff1111 or something at some locations, while on
others the data is perfect. (im sending data out from the debug unit to
HyperTerminal for debugging)

I have tried all permutations and combinations of the initialization
sequence, but to no avail. Even tried changing both the ribbon cables
(ive got one for the address lines, another for the data). What could
be going wrong?? I dont think any of the SDRAMs has gone bad, because
they both seem to have the correct data sometimes.

COuld it be because of the fact that im using a seperate PCB for the
RAM chips??

Thanx in anticipation
Mayank

"Mayank Kaushik" <prehistorictoad2k@yahoo.com> wrote in message
news:1106581955.292822.256260@f14g2000cwb.googlegroups.com...
> Hi,
>
> Im trying to interface two 128Mbit SDRAMs (MT48LC8M16A2) to the
> AT91RM9200, but it doesnt seem to be going right. I have a custom board
> for the AT91, and a seperate board for the SDRAM, the two are connected
> through an ordinary ribbon cable.
>
> The master clock of the uC is running at 60Mhz. To test the integrity
> of the RAM, im writing data to a series of locations, say from
> 0x2000_0000 to 0x2000_0100. But when i read the data back, i find it to
> be garbled at *many* locations. I mean, instead of 0x11111111 that im
> writing, i get a 0xEff1111 or something at some locations, while on
> others the data is perfect. (im sending data out from the debug unit to
> HyperTerminal for debugging)
>
> I have tried all permutations and combinations of the initialization
> sequence, but to no avail. Even tried changing both the ribbon cables
> (ive got one for the address lines, another for the data). What could
> be going wrong?? I dont think any of the SDRAMs has gone bad, because
> they both seem to have the correct data sometimes.
>
> COuld it be because of the fact that im using a seperate PCB for the
> RAM chips??
>
> Thanx in anticipation
> Mayank

How long are the ribbon cables? Do alternate signal and ground wires? How
well are the RAM supplies decoupled?

Peter

Hi,

Peter Dickerson wrote:
> How long are the ribbon cables?

How long? er..approx 25-40cms.

>Do alternate signal and ground wires?

I didnt understand that..

>How well are the RAM supplies decoupled?
Both the SDRAM chips are on the same PCB, one on either face. They both
get their supply from the same source...im not sure since i didnt build
the board myself, but i think their supply lines are tied together and
come from the same main line.

Thanx
Mayank

Mayank Kaushik wrote:

> > How long are the ribbon cables?
>
> How long? er..approx 25-40cms.

Very long!

> >Do alternate signal and ground wires?
>
> I didnt understand that..

Is the cable wired like this:
pin1 - signal1
pin2 - signal2
pin3 - signal3
pin4 - signal4
(...)

or like this:

pin1 - signal1
pin2 - GND
pin3 - signal2
pin4 - GND
(...)

> >How well are the RAM supplies decoupled?
> Both the SDRAM chips are on the same PCB, one on either face. They
both

This isn't what he was asking. Are there decoupling capacitors on the
SDRAM PCB? Are there separate decoupling caps for each pair of Vcc/Vss
pins on each chip? Have you inspected the power rails at the chip pins
with an oscilloscope, referenced to local ground on the PCB and also
referenced to ground on the main CPU board?

Hi!

> Is the cable wired like this:
> pin1 - signal1
> pin2 - signal2
> pin3 - signal3
> pin4 - signal4
> (...)

Thats the way its wired..bad, huh?

> Are there decoupling capacitors on the
> SDRAM PCB? Are there separate decoupling caps for each pair of
Vcc/Vss
> pins on each chip? Have you inspected the power rails at the chip
pins
> with an oscilloscope, referenced to local ground on the PCB and also
> referenced to ground on the main CPU board?

Er..Nahin,Nope respectively :-( I did inspect the pins on the SDRAM
that are fed Vdd and Vss with a multimeter, the level was correct..do u
mean the measurement of the capacitance between them..i dont have any
experience with these things, some enlightenment would be welcome, im
still an undergrad.

One question..how is the Hard Drive of a PC able to get by with its
equally long IDE cable??

Regards
Mayank

In comp.arch.embedded,
Mayank Kaushik <prehistorictoad2k@yahoo.com> wrote:
>
>One question..how is the Hard Drive of a PC able to get by with its
>equally long IDE cable??
>
They are designed for use with long cables and use special line-driver
circuits. SDRAMs are designed to be placed on-board. Also for the high-
speed IDE versions you are required to use a special 80-conductor IDE
cable, which puts an extra ground wire between every signal line.

-- 
Stef    (remove caps, dashes and .invalid from e-mail address to reply by mail)

When you get your PH.D. will you get able to work at BURGER KING?

Mayank Kaushik <prehistorictoad2k@yahoo.com> wrote:

> One question..how is the Hard Drive of a PC able to get by with its
> equally long IDE cable??

For starters: that cable (at least originally), carries only ISA bus
type signals, whose clock speed is only about 8 MHz, or 125
nanoseconds.

Second, a counter-question: why, do you think, did the specification
of the ATAPI cable have to change, as of the "UDMA" generation, to now
80 wires (twice the original)?

-- 
Hans-Bernhard Broeker (broeker@physik.rwth-aachen.de)
Even if all the snow were burnt, ashes would remain.

Mayank Kaushik wrote:
> Hi,
> 
> Im trying to interface two 128Mbit SDRAMs (MT48LC8M16A2) to the
> AT91RM9200, but it doesnt seem to be going right. I have a custom board
> for the AT91, and a seperate board for the SDRAM, the two are connected
> through an ordinary ribbon cable.

Redo from start.

I think you'll never get it to work that
way.  Redesign it with the SDRAM on the
same board.  If *must* try to get it to
work, look for reflections on the control
signals and try to dampen them out with
series resistors.

Hans-Bernhard Broeker wrote:
> Second, a counter-question: why, do you think, did the specification
> of the ATAPI cable have to change, as of the "UDMA" generation, to
now
> 80 wires (twice the original)?

errr..ummm...ah..they put in xtra (ground?) cables to take care of the
currents that would be induced in the neighbouring cables due to the
signals that change at a high speed (to provide a return path for the
currents??) ???

Regards,
Mayank

"Mayank Kaushik" <prehistorictoad2k@yahoo.com> wrote :

> Hi!
> 
>> Is the cable wired like this:
>> pin1 - signal1
>> pin2 - signal2
>> pin3 - signal3
>> pin4 - signal4
>> (...)
> 
> Thats the way its wired..bad, huh?

nice VHF Transmitter you got there :)
start with replacing this cable with UDMA60/100/133 HDD IDE cable 
wiring as larwe suggested

> Er..Nahin,Nope respectively :-( I did inspect the pins on the
> SDRAM that are fed Vdd and Vss with a multimeter, the level was
> correct..do u mean the measurement of the capacitance between
> them..i dont have any experience with these things, some
> enlightenment would be welcome, im still an undergrad.

solder decoupling capacitors directly to ram pins

Pozdrawiam.
-- 
RusH   //
 http://randki.o2.pl/profil.php?id_r=352019
Like ninjas, true hackers are shrouded in secrecy and mystery.
You may never know -- UNTIL IT'S TOO LATE.