Micro with DMA output engine?

On Thu, 19 Jan 2006 16:50:35 -0800, larwe wrote:

> I'm looking for a micro that I can use to do semi-software-based video
> output. Pixel clock would be ~5.7MHz or ~11.5MHz, I'd prefer the higher
> rate but would settle for the lower.
> 
> So I'm looking for something with ~64K of RAM and a DMA engine that can
> output bytes without CPU intervention. I'd generate the sync pulses in
> software and use the DMA engine to reduce the CPU load on actually
> outputting video data.

Freescale MPC5534?  64K static RAM, 32-channel eDMA.  Overkill for your
app probably.


   ~Dave~

larwe wrote:
> I'm looking for a micro that I can use to do semi-software-based video
> output. Pixel clock would be ~5.7MHz or ~11.5MHz, I'd prefer the
> higher rate but would settle for the lower.
>
> So I'm looking for something with ~64K of RAM and a DMA engine that
> can output bytes without CPU intervention. I'd generate the sync
> pulses in software and use the DMA engine to reduce the CPU load on
> actually outputting video data.
>
> Catch - I don't want external SDRAM on the board. So, all the micros
> I've found with on-chip LCD controller (which would do what I want
> admirably) are out.
>
> My next line of attack is to put an external SRAM on the board and use
> an external counter to push bytes out of it and interrupt the CPU at
> the end of each scanline; I don't much want to go that route but will
> if I have to...

AT91SAM9261 has LCD controller and built in 160 kB SRAM
Can also run SSC and SPI at high speed ujsing DMA (11.5 MHz is fine)
Boots from a serial dataflash.
Should start sampling rev B very soon (rev A has a bug in the USB host)


-- 
Best Regards,
Ulf Samuelsson
ulf@a-t-m-e-l.com
This message is intended to be my own personal view and it
may or may not be shared by my employer Atmel Nordic AB

Paul Marciano wrote:

> Something like a Philips LPC2214 with a 64K SRAM and a small CPLD may
> be a fun combination (although it obviously breaks your "no SRAM"

Ah, but I didn't say no SRAM, I said no SDRAM - because it's fiendishly
difficult to source in "boutique" quantities and I'm tired of
scrabbling through a pile of SODIMMs looking for chips of the right
density.

> requirement.  The SRAM + CPLD combo can be had for $10.  Add another
> $10 for the ARM chip.  Not too much real estate.

Do you have a CPLD recommendation? It's five years since I used one....
Lattice isp2032. I'd like something with a free schematic
capture/chip-burning tool, since I'm not spending $5k on a tool to be
used once.

Ulf Samuelsson wrote:

> AT91SAM9261 has LCD controller and built in 160 kB SRAM
> Can also run SSC and SPI at high speed ujsing DMA (11.5 MHz is fine)
> Boots from a serial dataflash.
> Should start sampling rev B very soon (rev A has a bug in the USB host)

Sorry Ulf, when I read this message and run it through my internal
low-pass filter, I see the following:

"AT91SAM9261 doesn't exist yet".

Besides, this is strictly not a commercial product, I doubt the volume
will exceed a hundred pieces per year.

larwe wrote:
> Ulf Samuelsson wrote:
>
>> AT91SAM9261 has LCD controller and built in 160 kB SRAM
>> Can also run SSC and SPI at high speed ujsing DMA (11.5 MHz is fine)
>> Boots from a serial dataflash.
>> Should start sampling rev B very soon (rev A has a bug in the USB
>> host)
>
> Sorry Ulf, when I read this message and run it through my internal
> low-pass filter, I see the following:
>
> "AT91SAM9261 doesn't exist yet".

It has been in the lab since May last year.
Dev boards are due to be shipped to customers early February.
If you redecide, You need to use the internal LCD since the DMA
controllers only work with serial peripherals and the LCD.

> Besides, this is strictly not a commercial product, I doubt the volume
> will exceed a hundred pieces per year.

www.iotech.dk releases an AT91RM9200 module w FPGA this month.
Maybe it would make more sense to go with a CPU module
than to design your own H/W.


-- 
Best Regards,
Ulf Samuelsson
ulf@a-t-m-e-l.com
This message is intended to be my own personal view and it
may or may not be shared by my employer Atmel Nordic AB

Ulf Samuelsson wrote:

> >> AT91SAM9261 has LCD controller and built in 160 kB SRAM
>
> It has been in the lab since May last year.

If it isn't at Digi-Key, I can't consider it. Sorry.

> Maybe it would make more sense to go with a CPU module
> than to design your own H/W.

I've got form factor constraints, unfortunately - I have to design my
own board to fit a very unusual shape.

Hi Peter,

> I did this with an LPC2106 originally but without DMA and under
> interrupts. Believe me there is still a lot of processing time left for
> other things.

That's a very impressive little board! I believe my application can
probably _just_ run in the blanking intervals - but it leaves me no
margin at all. I'd rather be able to run with a closer to 100% duty
cycle.

If I can't find a micro with DMA, I'm going to build some external
hardware - I haven't yet decided if it needs to be a "full" CRTC
implementation or whether I will just have an external scanline buffer
to take the DMA load off the CPU.

larwe wrote:
> Do you have a CPLD recommendation? It's five years since I used one....
> Lattice isp2032. I'd like something with a free schematic
> capture/chip-burning tool, since I'm not spending $5k on a tool to be
> used once.

I've only used Xilinx devices, but I expect Altera ones are comparible.
Both Xilinx and Altera have free toolsets on their website.

I can't estimate the size of part you'll need. If I were doing it I'd
write the verilog code first and then choose the cheapest part that
fits.

Or even better - post a detailed description of what you want to do to
comp.arch.fpga - you may get a very precise answer (I'm not very
experienced, sorry).

Good luck!

Paul.

larwe wrote:
> Do you have a CPLD recommendation? It's five years since I used one....
> Lattice isp2032. I'd like something with a free schematic
> capture/chip-burning tool, since I'm not spending $5k on a tool to be
> used once.

  You could try
www.Altera.com
www.Xilinx.com
www.Lattice.com
  and look there for FREE tools, and CPLD sections ?

  Or, since Digikey seems to be your window on the world,
probably best to actually start there ?
www.digikey.com

  There are other solutions to your display problem, but I'll
leave you to work that out yourself...

-jg

Larwe,

When I originally did this with the LPC2106 I used a separate cpu for 
the application. But after various improvements in the software plus 
some sneaky optimizations (skip blank lines etc) plus the high-speed of 
the Philips ARM7 family I am able to run applications very comfortably.

When I need to do a major update of the display information I tell the 
video generator to blank the display (still synching) to free-up some 
additional processing time for the application. Doing this usually means 
that the application completes everything in less than a frame anyway so 
the viewer sees nothing more than the screen updating.

But that depends upon your application I suppose but bear in mind that 
if you do happen to find a cpu with the RAM and DMA that it mighn't run 
all that fast anyway, especially with the DMA running.

But let us know if you do happen to find a suitable cpu.

*Peter*

larwe wrote:
> Hi Peter,
> 
>> I did this with an LPC2106 originally but without DMA and under
>> interrupts. Believe me there is still a lot of processing time left for
>> other things.
> 
> That's a very impressive little board! I believe my application can
> probably _just_ run in the blanking intervals - but it leaves me no
> margin at all. I'd rather be able to run with a closer to 100% duty
> cycle.
> 
> If I can't find a micro with DMA, I'm going to build some external
> hardware - I haven't yet decided if it needs to be a "full" CRTC
> implementation or whether I will just have an external scanline buffer
> to take the DMA load off the CPU.
>