Simple ram model

Hi, Guy's,

I'm not sure if this is the best place to ask but, I am currently learning
VHDL and am trying to design a RAM model with the following spec:

Inputs: A (3 bit address), D (4 bit data), Clock, plus control input(s) as
required

Output: Q (5 bit data)

The design contains two units, a RAM (3 bit address, 4 bit data, separate
data input and output) and an arithmetic unit (two 4-bit data inputs, one
5-bit output). These should be separate instances in the design.

The design should carry out the following functions:

1. Write an input D to address A.
2. Read from address A (output to 4 LSBs of Q).
3. Add contents of address A to input D (output to Q).

I have to use the std_logic and std_logic_vector types throughout. 

Any help is much appreciated,

Thanks,

Stephen.

melvin wrote:

> I'm not sure if this is the best place to ask but, I am currently learning
> VHDL and am trying to design a RAM model with the following spec:

So what was your specific question? I saw a homework problem and a
request for a solution, no evidence that you attempted this problem or
even gave it any thought beyond wanting a canned solution from someone
else.

If I ever became an EE professor I would be sure to spend a couple of
hours a day here and in sci.electronics.design.

larwe wrote:
> melvin wrote:
> 
> 
>>I'm not sure if this is the best place to ask but, I am currently learning
>>VHDL and am trying to design a RAM model with the following spec:
> 
> 
> So what was your specific question? I saw a homework problem and a
> request for a solution, no evidence that you attempted this problem or
> even gave it any thought beyond wanting a canned solution from someone
> else.
> 
> If I ever became an EE professor I would be sure to spend a couple of
> hours a day here and in sci.electronics.design.

Push on Lewin! With your current activities it's hard to avoid
becoming one.

The OP seems to be from The Robert Gordon University, Aberdeen, UK.

-- 

Tauno Voipio
tauno voipio (at) iki fi

Tauno Voipio wrote:

> Push on Lewin! With your current activities it's hard to avoid
> becoming one.

Synonymous with push off? ;) I'm not sure if going into academia would
be a career upgrade or downgrade for me. Might be nice to "retire" into
that sector, though - most of my professors at school seem to be
engineers who shifted into a different gear and suddenly found
themselves behind a lectern.

larwe wrote:
> Tauno Voipio wrote:
> 
> 
>>Push on Lewin! With your current activities it's hard to avoid
>>becoming one.
> 
> 
> Synonymous with push off? ;) I'm not sure if going into academia would
> be a career upgrade or downgrade for me. Might be nice to "retire" into
> that sector, though - most of my professors at school seem to be
> engineers who shifted into a different gear and suddenly found
> themselves behind a lectern.

You have to want it, of course. I have the feeling that
education would benefit of a teacher with your way of
looking at things and also your experience.

I have done my duty in teaching in the 70's, and I'd
rather coach and push suitable people to become teachers.

An instructor is the wrong person, if the position
feels like retirement.

-- 

Tauno Voipio
tauno voipio (at) iki fi

melvin wrote:
> Hi, Guy's,

Points deducted for apostrophe abuse.

> I'm not sure if this is the best place to ask but, I am currently learning
> VHDL and am trying to design a RAM model with the following spec:
>
> Inputs: A (3 bit address), D (4 bit data), Clock, plus control input(s) as
> required
>
> Output: Q (5 bit data)
>
> The design contains two units, a RAM (3 bit address, 4 bit data, separate
> data input and output) and an arithmetic unit (two 4-bit data inputs, one
> 5-bit output). These should be separate instances in the design.
>
> The design should carry out the following functions:
>
> 1. Write an input D to address A.
> 2. Read from address A (output to 4 LSBs of Q).
> 3. Add contents of address A to input D (output to Q).
>
> I have to use the std_logic and std_logic_vector types throughout.

I'll do your homework for you if you pay me US$15,000.

-a

>> Hi, Guy's,
> 
> Points deducted for apostrophe abuse.

Perhaps a grocer's son.

	Andrew