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Arm7 or Freescale Coldfire?

Started by Roberto April 3, 2006
On Wed, 05 Apr 2006 17:11:01 -0700, Didi wrote:

>> Okay, I'll bite. What is "fast loop mode"? I know what loop mode, >> introduced on the 68010, is. > > I don't remember (perhaps I never knew) what it was on the 010, but I > do remember the loop mode on the CPU32 - it is when you use > the dbcc instruction with an offset of $fffc (-4), so the loop repeats > a single single-word opcode. The CPU stops fetching, does just > the data accesses (CPU32 has no cache memory). > ... > Was loop mode the same on the 010?
Yes. If you do just an instruction trace on a logic analyzer, the processor appears to have entered a black hole for some period of time, then it "escapes" and resumes normal execution. Makes for an interesting trace for a junior engineer to explain. ;-) ~Dave~
Didi wrote:
>> Thus Freescale's MPC5xx line of PPC-based microcontrollers >> have a BDM interface for debugging, and a JTAG interface for boundary >> scanning. I don't know about any other Freescale PPC devices. > > None of the newer ones (8xxx, 5xxx etc.) have separate BDM, all > has gone JTAG - which is good enough an interface, my sole issue > with it is the data secrecy. They claim to keep it secret because > it would be a great support effort, which is of course nonsense. > Some people do get enough data to make debugging equipment. >
I'll take your word for it - I haven't used any PPC chips other than the MPC5xx line. I do see, however, that the MPC55xx line have dropped the BDM, and have JTAG only for boundary scan. For debugging, they use a Nexus interface (which is also available on the MPC5xx, but I haven't tried it). The Nexus interface seems to be able to provide real-time tracing, like the BDM, but runs faster and has more pins (the old BDM is too limited to handle real-time tracing at higher speeds, with features such as pipelining and speculative execution). Again, this is a dedicated debugging interface rather than a simple serial backdoor such as JTAG. As to how well it is documented, I don't know - I've never had occasion to look at the details.
Dave wrote:
> On Wed, 05 Apr 2006 13:54:38 +0100, David Brown wrote: > >> The CPU32 also has a couple of additions compared to the 68020, such as >> a fast loop mode > > Okay, I'll bite. What is "fast loop mode"? I know what loop mode, > introduced on the 68010, is. > > > ~Dave~
It's a mode when you have a single-word instruction followed by a DBcc instruction in a tight loop, such as generated by the code: unsigned short int n = 1000; while (n--) { *p++ = *q++; } Of course, it could well be that the 68010 has this mode - the CPU32 manual isn't very clear on which features are new compared to the 68000, or compared to the 68020 (the 68010 was not much used, was it?) According to the CPU32 manual (I've got it open at the moment anyway), the extra features of the CPU32 include low-power modes, and table lookup and interpolate instructions. Missing instructions include the bit-field instructions, compare-and-set, coprocessor control, and BCD instructions.
David Brown <david@westcontrol.removethisbit.com> writes:
> Dave wrote: > > On Wed, 05 Apr 2006 13:54:38 +0100, David Brown wrote: > > > >> The CPU32 also has a couple of additions compared to the 68020, such as > >> a fast loop mode > > > > Okay, I'll bite. What is "fast loop mode"? I know what loop mode, > > introduced on the 68010, is. > > It's a mode when you have a single-word instruction followed by a DBcc > instruction in a tight loop, such as generated by the code: > unsigned short int n = 1000; > while (n--) { *p++ = *q++; } > > Of course, it could well be that the 68010 has this mode - the CPU32 > manual isn't very clear on which features are new compared to the 68000, > or compared to the 68020 (the 68010 was not much used, was it?) > > According to the CPU32 manual (I've got it open at the moment anyway), > the extra features of the CPU32 include low-power modes, and table > lookup and interpolate instructions. Missing instructions include the > bit-field instructions, compare-and-set, coprocessor control, and BCD > instructions.
ABCD and SBCD are indicated as being 68K family instructions.