AVR Flash EMI Susceptibility?

I've just had an ATMega 64 come back from EMC RF susceptibility testing (10
V/m) with the first 100 bytes (1 page) of Flash erased (reading 0xFF).   The
application had been running perfectly before testing.  Software inspection
around the only SPM (store program memory) instruction in the entire program
memory indicates that this is unlikely to cause the fault we have seen.

Has anyone out there experienced any similar spontaneous page erasure of AVR
flash under medium strength RF fields?  Did you overcome it?

--
Alf Katz
alfkatz@remove.the.obvious.ieee.org

Humm... this is interesting. Have you posted this question or problem on the 
www.avrfreaks.net forum yet?

"Unbeliever" <alfkatz@remove.the.bleedin.obvious.ieee.org> wrote in message 
news:419892c5$0$9562$afc38c87@news.optusnet.com.au...
> I've just had an ATMega 64 come back from EMC RF susceptibility testing 
> (10
> V/m) with the first 100 bytes (1 page) of Flash erased (reading 0xFF). 
> The
> application had been running perfectly before testing.  Software 
> inspection
> around the only SPM (store program memory) instruction in the entire 
> program
> memory indicates that this is unlikely to cause the fault we have seen.
>
> Has anyone out there experienced any similar spontaneous page erasure of 
> AVR
> flash under medium strength RF fields?  Did you overcome it?
>
> --
> Alf Katz
> alfkatz@remove.the.obvious.ieee.org
>
> 

In article <419892c5$0$9562$afc38c87@news.optusnet.com.au>, Unbeliever wrote:
> I've just had an ATMega 64 come back from EMC RF susceptibility testing (10
> V/m) with the first 100 bytes (1 page) of Flash erased (reading 0xFF).   The
> application had been running perfectly before testing.  Software inspection
> around the only SPM (store program memory) instruction in the entire program
> memory indicates that this is unlikely to cause the fault we have seen.

Does the chip have any sort of brownout protection enabled?  If you
were in brownout, you can't count on the SPM doing what the software
intended.

-- 
John W. Temples, III

"Earl Bollinger" <earlwbollinger@comcast.net> wrote in message
news:I82dnUTGarqnPAXcRVn-ow@comcast.com...
> Humm... this is interesting.
Like the Chinese curse "May you live in interesting times"!!!
> Have you posted this question or problem on the www.avrfreaks.net forum
yet?
Have now, thanks for the tip.

Cheers
--
Alf Katz
alfkatz@remove.the.obvious.ieee.org

"John Temples" <usenet@xargs-spam.com> wrote in message
news:slrncpimt4.72u.usenet@jwt.xargs.com...
> Does the chip have any sort of brownout protection enabled?  If you
> were in brownout, you can't count on the SPM doing what the software
> intended.
>
Thanks, John,
    I do have brownout detection enabled, but a good idea given the
information.  If we can get it to recur the next time we're doing
susceptibility (Murphy says we can't), I guess I'll be forced to forgo the
flexibility of in-the-field serial reprogramming and disable
self-programming via the fuse bits.  I *think* self programming via the SPM
instruction is the only way to do a page erase.

Cheers,
--
Alf Katz
alfkatz@remove.the.obvious.ieee.org

> susceptibility (Murphy says we can't), I guess I'll be forced to forgo the
> flexibility of in-the-field serial reprogramming and disable
> self-programming via the fuse bits.  I *think* self programming via the SPM
> instruction is the only way to do a page erase.

I dont want to scare you, but a fuse-bit is a only a flash cell, too.
If the EMI conditions are such that the chip does an SPM to the wrong
page or where no SPM instruction actually was, it can just as well do
an SPM where the fuse-bit said "NO".

As long as the voltage pumps are on-chip, things can go wrong.  Less
logic to operate them can make it less probable (eg chip without SPM
funcionality), but only removing them completely will make the chip
safe (eg external VPP like in the old days).

Thats my opinion only, certainly flash mcu manufacturers have a different
one.

Marc

jetmarc wrote:
>>susceptibility (Murphy says we can't), I guess I'll be forced to forgo the
>>flexibility of in-the-field serial reprogramming and disable
>>self-programming via the fuse bits.  I *think* self programming via the SPM
>>instruction is the only way to do a page erase.
> 
> 
> I dont want to scare you, but a fuse-bit is a only a flash cell, too.
> If the EMI conditions are such that the chip does an SPM to the wrong
> page or where no SPM instruction actually was, it can just as well do
> an SPM where the fuse-bit said "NO".
> 
> As long as the voltage pumps are on-chip, things can go wrong.  Less
> logic to operate them can make it less probable (eg chip without SPM
> funcionality), but only removing them completely will make the chip
> safe (eg external VPP like in the old days).
> 
> Thats my opinion only, certainly flash mcu manufacturers have a different
> one.

  I think this is a key reason we see a re-emergence of ROM flow 
variants of FLASH uC. These days, it is very unlikely they are 
completely different die/mask flows, most efficent is to disable the 
voltage pumps, and skip the FLASH cycle testing = lower outgoing price, 
AND the highest field reliability.
  I believe some Automotive customers demand high voltage PGM enable, for
similar reasons.
-jg