Hi all, I'm thinking of ways to implement a nearly non-volatile counter using flash and RAM. Idea is to count events in a RAM counter and write the count to flash every n times. At first I thought I'd just use successive locations in flash until I need to reformat the entire sector but I'm thinking it may be better to flip single bits from 1 to 0 with each bit indicating n events. That way I don't waste an entire DWORD for each update. Does anybody know of a ready-made solution for this kind of thing? Thanks, Andrew
Non-volatile counter implementation
Started by ●August 17, 2006
Reply by ●August 17, 20062006-08-17
andrew queisser wrote:> Hi all, > > I'm thinking of ways to implement a nearly non-volatile counter using flash > and RAM. Idea is to count events in a RAM counter and write the count to > flash every n times. At first I thought I'd just use successive locations in > flash until I need to reformat the entire sector but I'm thinking it may be > better to flip single bits from 1 to 0 with each bit indicating n events. > That way I don't waste an entire DWORD for each update. > > Does anybody know of a ready-made solution for this kind of thing?There have been earlier threads along this line. With flash, there are hidden, undocumented details to watch out for: * What block size is _actually_ erased during a byte-write ? * Does write of increasing 0's save degradation, or not ? ( eg if you choose to write 1,2,3,4, lows in the LSB, to give a 8:1 saving in erase, does that actually make it to the silicon ? ) * How do cells actually fail - can you read-back to catch a failure, or it is a power-removed leakage failure ? Probably the best way, is to take your chosen chip, and thrash a few in the corner of the lab, to failure. -jg
Reply by ●August 17, 20062006-08-17
"Jim Granville" <no.spam@designtools.maps.co.nz> wrote in message news:44e4dc1e$1@clear.net.nz...> andrew queisser wrote: >> Hi all, >> >> I'm thinking of ways to implement a nearly non-volatile counter using >> flash and RAM. Idea is to count events in a RAM counter and write the >> count to flash every n times. At first I thought I'd just use successive >> locations in flash until I need to reformat the entire sector but I'm >> thinking it may be better to flip single bits from 1 to 0 with each bit >> indicating n events. That way I don't waste an entire DWORD for each >> update. >> >> Does anybody know of a ready-made solution for this kind of thing? > > There have been earlier threads along this line. > With flash, there are hidden, undocumented details to watch out for: > > * What block size is _actually_ erased during a byte-write ? > * Does write of increasing 0's save degradation, or not ? > ( eg if you choose to write 1,2,3,4, lows in the LSB, to > give a 8:1 saving in erase, does that actually make it to > the silicon ? ) > * How do cells actually fail - can you read-back to catch > a failure, or it is a power-removed leakage failure ? > > Probably the best way, is to take your chosen chip, and > thrash a few in the corner of the lab, to failure. > > -jg >Good points, thanks. Not sure I understand your second comment, though. Are you saying that degradation might not be localised to a single bit? In that case I could save myself the trouble of separating out the bits. Andrew
Reply by ●August 17, 20062006-08-17
"andrew queisser" <andrewdotqueisser@hp.com> wrote in message news:uc4Fg.126$b75.121@news.cpqcorp.net...> Hi all, > > I'm thinking of ways to implement a nearly non-volatile counter using > flash and RAM. Idea is to count events in a RAM counter and write the > count to flash every n times. At first I thought I'd just use successive > locations in flash until I need to reformat the entire sector but I'm > thinking it may be better to flip single bits from 1 to 0 with each bit > indicating n events. That way I don't waste an entire DWORD for each > update. > > Does anybody know of a ready-made solution for this kind of thing? > > Thanks, > Andrew > >I would use a small, low cost micro (PIC maybe) and save the count in the EEPROM. Single chip solution. Thomas
Reply by ●August 17, 20062006-08-17
"Thomas Magma" <somewhere@overtherainbow.com> wrote in message news:US5Fg.424407$IK3.93287@pd7tw1no...> > "andrew queisser" <andrewdotqueisser@hp.com> wrote in message > news:uc4Fg.126$b75.121@news.cpqcorp.net... >> Hi all, >> >> I'm thinking of ways to implement a nearly non-volatile counter using >> flash and RAM. Idea is to count events in a RAM counter and write the >> count to flash every n times. At first I thought I'd just use successive >> locations in flash until I need to reformat the entire sector but I'm >> thinking it may be better to flip single bits from 1 to 0 with each bit >> indicating n events. That way I don't waste an entire DWORD for each >> update. >> >> Does anybody know of a ready-made solution for this kind of thing? >> >> Thanks, >> Andrew >> >> > > I would use a small, low cost micro (PIC maybe) and save the count in the > EEPROM. Single chip solution. > > Thomas >Oh, I should have mentioned that we already have flash, RAM, etc. available in our system so this is just a software question. Is there an advantage of EEPROM over flash in terms of erase cycles? Andrew
Reply by ●August 17, 20062006-08-17
"andrew queisser" <andrewdotqueisser@hp.com> wrote in message news:uc4Fg.126$b75.121@news.cpqcorp.net...> Hi all, > > I'm thinking of ways to implement a nearly non-volatile counter using > flash and RAM. Idea is to count events in a RAM counter and write the > count to flash every n times. At first I thought I'd just use successive > locations in flash until I need to reformat the entire sector but I'm > thinking it may be better to flip single bits from 1 to 0 with each bit > indicating n events. That way I don't waste an entire DWORD for each > update. > > Does anybody know of a ready-made solution for this kind of thing? > > Thanks, > Andrew > >Look into ferroelectric ram. It is fast writing, reading and is non-volatile. Don
Reply by ●August 17, 20062006-08-17
>> I would use a small, low cost micro (PIC maybe) and save the count in the >> EEPROM. Single chip solution. >> >> Thomas >> > Oh, I should have mentioned that we already have flash, RAM, etc. > available in our system so this is just a software question. Is there an > advantage of EEPROM over flash in terms of erase cycles? > > Andrew > >Here is a quote from Wikipedia: "While RAM has no limitations on rewrites to memory, EEPROMs are limited in that repeated write and erase cycles eventually damage the thin insulating layer, a process called 'wear out'. Some early EEPROMs could only perform about 100 erase-write cycles but new models specify 100,000 erase-write cycles or more. Flash memory is cheaper than EEPROM but will wear out faster, typically after 10,000 erase-write cycles. Another reason why EEPROM is more effective for storing configuration data is that Flash memory has to erase multiple memory locations at a time. Changing a single byte is only possible by rewriting a whole block, which causes the flash memory to wear out more quickly than one might otherwise expect." Thomas
Reply by ●August 17, 20062006-08-17
andrew queisser wrote:> "Thomas Magma" <somewhere@overtherainbow.com> wrote in message > news:US5Fg.424407$IK3.93287@pd7tw1no... > >>"andrew queisser" <andrewdotqueisser@hp.com> wrote in message >>news:uc4Fg.126$b75.121@news.cpqcorp.net... >> >>>Hi all, >>> >>>I'm thinking of ways to implement a nearly non-volatile counter using >>>flash and RAM. Idea is to count events in a RAM counter and write the >>>count to flash every n times. At first I thought I'd just use successive >>>locations in flash until I need to reformat the entire sector but I'm >>>thinking it may be better to flip single bits from 1 to 0 with each bit >>>indicating n events. That way I don't waste an entire DWORD for each >>>update. >>> >>>Does anybody know of a ready-made solution for this kind of thing? >>> >>>Thanks, >>>Andrew >>> >>> >> >>I would use a small, low cost micro (PIC maybe) and save the count in the >>EEPROM. Single chip solution. >> >>Thomas >> > > Oh, I should have mentioned that we already have flash, RAM, etc. available > in our system so this is just a software question. Is there an advantage of > EEPROM over flash in terms of erase cycles?Look at the data sheets, commonly EEPROM's are designed to be cycled, whilst FLASH, expecially uC flash, is not. Often EEPROMs use hidden Error correction bits, to get the cycle counts up. The best separate-chip technology for non volatile counters would be Ramtron's FRAM devices. Zero write delays, and no life cycle limits <paste>> Are > you saying that degradation might not be localised to a single bit? In that > case I could save myself the trouble of separating out the bits.My point is, you will need to test this, to be really sure.
Reply by ●August 17, 20062006-08-17
On Thursday, in article <uc4Fg.126$b75.121@news.cpqcorp.net>
andrewdotqueisser@hp.com "andrew queisser" wrote:
>Hi all,
>
>I'm thinking of ways to implement a nearly non-volatile counter using flash
>and RAM. Idea is to count events in a RAM counter and write the count to
>flash every n times. At first I thought I'd just use successive locations in
>flash until I need to reformat the entire sector but I'm thinking it may be
>better to flip single bits from 1 to 0 with each bit indicating n events.
>That way I don't waste an entire DWORD for each update.
>
>Does anybody know of a ready-made solution for this kind of thing?
Depending on what your counting the best alternative would be good supply
supervision and one of the Ramtrom Ferroelectric RAM chips, minimal hassle
and very high write cycles.
If counting time you might be able to use some of their other chips.
Almost single chip solution, as power supply supervision to disable accesses
will be necessary on ANY solution.
--
Paul Carpenter | paul@pcserviceselectronics.co.uk
<http://www.pcserviceselectronics.co.uk/> PC Services
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Reply by ●August 18, 20062006-08-18
Donald Harris wrote:> "andrew queisser" <andrewdotqueisser@hp.com> wrote in message > news:uc4Fg.126$b75.121@news.cpqcorp.net... >> Hi all, >> >> I'm thinking of ways to implement a nearly non-volatile counter using >> flash and RAM. Idea is to count events in a RAM counter and write the >> count to flash every n times. At first I thought I'd just use successive >> locations in flash until I need to reformat the entire sector but I'm >> thinking it may be better to flip single bits from 1 to 0 with each bit >> indicating n events. That way I don't waste an entire DWORD for each >> update. >> >> Does anybody know of a ready-made solution for this kind of thing? >> >> Thanks, >> Andrew >> >> > > Look into ferroelectric ram. It is fast writing, reading and is > non-volatile. > > Don > >Yes Look up FRAM from Ramtron. 8pin chips like EEprom. 10E14 writes, with no write delay.
