Forums

powerPC simulation

Started by san August 25, 2006
Hello,
am New to PCB board design cycle. Working on circuit having powerPC
interfaced with nand flash,FPGA,DDR and ethernet ASIC. I have to do the

cycle accurate Functional simulation of the above circuit.
How should i go for it?
Queries:
1. Which tool i should use.
2. Do i need to convert schematics into verilog?
3. Do i need Models for all the components in the circuit.
 What is the procedure for doing functional simulation.
Also Need to write test code for boot straping,memory mapping(initial
registers setting  file)and
GPIO and the same can be used while emulation further.
Experts Kindly guide me. 
Thanks in advance. 

Regards

> Hello, > am New to PCB board design cycle. Working on circuit having powerPC > interfaced with nand flash,FPGA,DDR and ethernet ASIC. I have to do the > > cycle accurate Functional simulation of the above circuit. > How should i go for it? > Queries: > 1. Which tool i should use. > 2. Do i need to convert schematics into verilog? > 3. Do i need Models for all the components in the circuit. > What is the procedure for doing functional simulation. > Also Need to write test code for boot straping,memory mapping(initial > registers setting file)and > GPIO and the same can be used while emulation further.
You have quite a task ahead of you. What is your experience in the embedded area? There are tools for simulating a PPC cycle-accurately, but I don't know if there are tools for everything. It's very difficult as soon as a RAM or Ethernet come into play. You won't be able to simulate more than a few hundred cycles. That's why people build prototypes after all. Why do you need a simulation of the whole system after all? If you need a RAM, you match the interface on both the CPU and the RAM, check the timing, and use it. Same story for Ethernet.