EmbeddedRelated.com
Forums
Memfault Beyond the Launch

Strategy to read FIFO of a 16752 rs232 Chip

Started by Steven P August 29, 2006
Hi

I need to control a TI 16C752 directly. My question is when the FIFO is
enabled ( it has 64 bytes TX/RX FIFO). The interrupt level can be set
with 8 bytes or 16 bytes, which means only when the data in FIFO
reaches this level, an interrupt will be generated.  How can I read the
last bytes if there is no interrupt to triggered the main program?

Some senario:

The interrupt level is set 8 bytes.

1.  If only 3 bytes is arrived and no more, there is no interrupt
coming. So I need to poll it with a  timer.

2.  After the last interrupt, I read all the data in the FIFO. And
after that, 3 additional bytes come. So it is quite same as the first
senario. Because there is no interrupt, I need to poll it with a timer.

I do not like to use a timer. Have any idea?

Another question is while 16752 contains 2 RS232 ports, can I set one
with RTS/CTS enabled, and the other without flow control? I do not find
information in the datasheet.


Steven

In comp.arch.embedded,
Steven P <photodose@gmx.de> wrote:
> Hi > > I need to control a TI 16C752 directly. My question is when the FIFO is > enabled ( it has 64 bytes TX/RX FIFO). The interrupt level can be set > with 8 bytes or 16 bytes, which means only when the data in FIFO > reaches this level, an interrupt will be generated. How can I read the > last bytes if there is no interrupt to triggered the main program? > > Some senario: > > The interrupt level is set 8 bytes. > > 1. If only 3 bytes is arrived and no more, there is no interrupt > coming. So I need to poll it with a timer. >
All fifo UART's I've used generate an interrupt on timeout (no chars received for x char times) in addition to the interrupt at the trigger level. I don't know the TI 16C752, but I don't expext it to be different. This does mean you can not assume you have gotten at least 8 bytes when you get an interrupt, it might be less on timeout. -- Stef (remove caps, dashes and .invalid from e-mail address to reply by mail)
Thank you very much for this timeout information.It is a great help.
With this there will be no problem to get data out from the FIFO.


Steven



Stef schrieb:

> In comp.arch.embedded, > Steven P <photodose@gmx.de> wrote: > > Hi > > > > I need to control a TI 16C752 directly. My question is when the FIFO is > > enabled ( it has 64 bytes TX/RX FIFO). The interrupt level can be set > > with 8 bytes or 16 bytes, which means only when the data in FIFO > > reaches this level, an interrupt will be generated. How can I read the > > last bytes if there is no interrupt to triggered the main program? > > > > Some senario: > > > > The interrupt level is set 8 bytes. > > > > 1. If only 3 bytes is arrived and no more, there is no interrupt > > coming. So I need to poll it with a timer. > > > All fifo UART's I've used generate an interrupt on timeout (no chars > received for x char times) in addition to the interrupt at the trigger > level. I don't know the TI 16C752, but I don't expext it to be different. > > This does mean you can not assume you have gotten at least 8 bytes when > you get an interrupt, it might be less on timeout. > > -- > Stef (remove caps, dashes and .invalid from e-mail address to reply by mail)

Memfault Beyond the Launch